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TI-TMP139.pdf
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TI-TMP139.pdf
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TMP139 0.5 °C Accuracy, JEDEC DDR5 Grade B, Digital Temperature Sensor With I
2
C
and I3C Interface
1 Features
• Supports JEDEC JESD302-1 DDR5 Grade B
temperature sensor
• Exceeds JEDEC temperature accuracy
specification:
– ±0.25 °C typical
– ±0.5 °C maximum (+75 °C to +95 °C)
– ±0.75 °C maximum (–40 °C to +125 °C)
• Operating temperature range: –40 °C to +125 °C
• Low power consumption:
– 4.7-µA typical average quiescent current
– 0.6-µA typical standby current
• I/O power supply of 1 V
• Core power supply of 1.8 V
• Two wire serial bus interface (I
2
C and I3C basic
operation modes)
• Up to 12.5-MHz data transfer rate in I3C basic
mode
• In Band Interrupt (IBI) for alerting host
• Parity error check function for host writes
• Packet error check function for host read and
writes
• 11-bit resolution: 0.25 °C (1 LSB)
• Standard 6-ball DSBGA (WCSP) package with
0.5-mm pitch
2 Applications
• DDR5 DIMM modules
• Server
• Laptops
• Workstations
• SSDs
3 Description
The TMP139 is a high-accuracy temperature sensor
with an I
2
C / I3C compliant digital interface supporting
In Band Interrupts (IBI). Supporting the interface
requirements of JEDEC JESD302-1 for Grade-B
devices, the TMP139 exceeds the temperature
accuracy requirements of the specification, enabling
higher performance DDR5 memory modules.
Available in a compact 6-ball DSBGA package,
TMP139 is designed for high-speed, high-accuracy
and low-power thermal monitoring applications.
The TMP139 has a typical accuracy of ±0.25 °C over
the entire temperature range from –40 °C to +125 °C
and offers an on-chip 11-bit analog-to-digital converter
(ADC) providing a temperature resolution of 0.25 °C.
The TMP139 is designed to operate from a core
power supply of 1.8 V and I/O power supply of 1 V,
with a low typical average quiescent current of 4.7 µA
when performing conversions every 125 ms.
Table 3-1. Device Information
PART NUMBER PACKAGE
(1)
BODY SIZE (NOM)
TMP139 DSBGA (6)
1.328 mm × 0.828
mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
TMP139
V
DDIO
= 1.0V V
DDSPD
= 1.8V
SDA
SCL
V
DDIO
V
DDSPD
VSS
SA
TMP139
SDA
SCL
V
DDIO
V
DDSPD
VSS
SA
LSCL
LSDA
SPD Hub
Local Sideband Bus
Figure 3-1. Simplified Schematic
www.ti.com
TMP139
SNIS217 – DECEMBER 2020
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
1
Product Folder Links: TMP139
TMP139
SNIS217 – DECEMBER 2020
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings ....................................... 4
6.2 ESD Ratings .............................................................. 4
6.3 Recommended Operating Conditions ........................4
6.4 Thermal Information ...................................................4
6.5 Electrical Characteristics ............................................5
6.6 Timing Requirements ................................................. 6
6.7 Switching Characteristics ...........................................6
6.8 Timing Diagrams......................................................... 7
6.9 Typical Characteristics................................................ 8
7 Detailed Description......................................................10
7.1 Overview................................................................... 10
7.2 Functional Block Diagram......................................... 10
7.3 Feature Description...................................................10
7.4 Device Functional Modes..........................................13
7.5 Programming............................................................ 32
7.6 Register Map.............................................................35
8 Application and Implementation.................................. 47
8.1 Application Information............................................. 47
8.2 Typical Application.................................................... 47
9 Power Supply Recommendations................................48
10 Layout...........................................................................49
10.1 Layout Guidelines................................................... 49
10.2 Layout Example...................................................... 49
11 Device and Documentation Support..........................50
11.1 Receiving Notification of Documentation Updates.. 50
11.2 Support Resources................................................. 50
11.3 Trademarks............................................................. 50
11.4 Electrostatic Discharge Caution.............................. 50
11.5 Glossary.................................................................. 50
12 Mechanical, Packaging, and Orderable
Information.................................................................... 50
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
DATE REVISION NOTES
December 2020 * Initial release.
TMP139
SNIS217 – DECEMBER 2020
www.ti.com
2 Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP139
5 Pin Configuration and Functions
1 2
A
B
C
Not to scale
SCL V
DDIO
SDA SA
VSS V
DDSPD
Figure 5-1. YAH Package 6-Pin DSBGA Top View
Table 5-1. Pin Functions
PIN
I/O DESCRIPTION
NAME BALL
SA B2 I Address select. Connected to V
DDSPD
or GND
SCL A1 I Serial clock
SDA B1 I/O
Serial data input and output. Pin may be open drain or push-pull in I3C mode and open drain
in I
2
C mode
V
DDIO
A2 I Supply voltage for sensor I/Os
V
DDSPD
C2 I Supply voltage for sensor core
VSS C1 — Ground
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TMP139
SNIS217 – DECEMBER 2020
Copyright © 2021 Texas Instruments Incorporated
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3
Product Folder Links: TMP139
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
Power supply, V
DDIO
–0.5 2.1 V
Power supply, V
DDSPD
–0.5 2.1 V
Input voltage SA –0.5 2.1 V
Input voltage SCL, SDA –0.5 V
DDIO
+ 0.3 V
Output sink current SDA ±15 mA
Junction temperature, T
J
–55 150 °C
Storage temperature, T
stg
–65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
6.2 ESD Ratings
VALUE UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2000
V
Charged device model (CDM), per JEDEC specification JESD22-C101
(2)
±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage
V
DDIO
0.95 1.0 1.05 V
V
DDSPD
1.7 1.8 1.98 V
I/O Voltage
SA 0
V
DDSPD
+
0.3
V
SCL, SDA 0 V
DDIO
+ 0.3 V
Operating free-air temperature, T
A
–40 125 °C
6.4 Thermal Information
THERMAL METRIC
(1)
TMP139
UNITYAH (WCSP)
6 PINS
R
θJA
Junction-to-ambient thermal resistance 116.6 °C/W
R
θJC(top)
Junction-to-case (top) thermal resistance 1.0 °C/W
R
θJC(bottom)
Junction-to-case (bottom) thermal resistance NA °C/W
R
θJB
Junction-to-board thermal resistance 33.6 °C/W
Ψ
JT
Junction-to-top characterization parameter 0.4 °C/W
Ψ
JB
Junction-to-board characterization parameter 33.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
TMP139
SNIS217 – DECEMBER 2020
www.ti.com
4 Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP139
6.5 Electrical Characteristics
at T
A
= −40 °C to +125 °C, V
DDIO
= 0.95 V to 1.05 V and V
DDSPD
= 1.7 V to 1.98 V (unless noted); typical specification are at
T
A
= 25 °C, V
DDIO
= 1 V and V
DDSPD
=1.8 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TEMPERATURE INPUT
T
ERR
Temperature Accuracy
+75 °C to +95 °C ±0.25 ±0.5 °C
–40 °C to +125 °C ±0.25 ±0.75 °C
T
RES
Resolution 1 LSB (11-bit) 0.25 °C
T
REPEAT
Repeatability
(1)
1 LSB
t
ACT
Active conversion time 5.5 ms
t
CONV
Conversion interval 125 ms
T
HYST
Temperature Hysteresis 1 °C
DIGITAL INPUT/OUTPUT
C
IN
Input capacitance
(2)
Input capacitance (SCL and SDA) 4 pF
R
ON
Output pullup and pulldown
driver impedance
SDA pin 20 100 Ω
I
LI
Leakage input current -1 0 1 µA
I
LO
Leakage output current -1 0 1 µA
V
IL
Low-level input logic –0.3 0.3 V
V
IH
High-level input logic 0.7 1.35 V
V
HYS
Input voltage hysteresis SCL and SDA pins 60 100 mV
V
OL
Low-level output logic SDA pin, I
OL
= –3 mA 0 0.3 V
V
OH
High-level output logic SDA pin, I
OH
= 3 mA 0.75 V
SLEW_RATE Output slew rate
(2)
SDA pin 0.1 1.0 V/ns
POWER SUPPLY
I
Q
Average current (serial bus
inactive)
125-ms conversion interval 4.7 10 µA
I
DDR
Average current (read
operation)
125-ms conversion interval, f
SCL
= 12.5 MHz 34 µA
I
DDW
Average current (write
operation)
125-ms conversion interval, f
SCL
= 12.5 MHz 30 µA
I
ACT
Active current During 5.5-ms active conversion 92 140 µA
I
DD1
Standby current
Between active conversion during continuous
conversion
0.6 4 µA
V
PON
Power-on reset threshold Monotonic rise between V
PON
and V
DDSPD(MIN)
1.6 V
V
POFF
Power-off reset threshold for
warm power on cycle
No ringback above V
POFF
0.3 V
t
INIT
Initialization time after
Power-on reset
(2)
Figure 7-2 10.0 ms
t
POFF
Warm power cycle off time
(2)
Figure 7-3 1.0 ms
t
SENSE_SA
Time from valid V
DDSPD
supply to sense SA pin for
LID code assignment
(2)
Figure 7-2 5.0 ms
t
RST
Device reinitialization time
(2)
(3)
40 µs
(1) Repeatability is the ability to reproduce a reading when the measured temperature is applied consecutively, under the same conditions.
(2) Parameter is specified by design
(3) Parameter is specified for RSTDAA Common Command Code
www.ti.com
TMP139
SNIS217 – DECEMBER 2020
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
5
Product Folder Links: TMP139
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