九齐NY8系列例程（ASM/C）

;======================================================================================================================= ;======================================================================================================================= ;File: NY8BM72A.h ;Description: The Header File for NY8BM72A ;Author: JasonLee ;Date: 2019/08/16 ;======================================================================================================================= ;======================================================================================================================= ;----------------------------------------------------------------------------------------------------------------------- ;MOVR and MOVAR instrutions for access R-page Register (General Purpose Register) ;----------------------------------------------------------------------------------------------------------------------- ;R-page sregisters ; bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 ;----------------------------------------------------------------------------------------------------------------------- ; 00H --------- Indirect Addressing Register INDF EQU 00H Pr_Indir_Addr EQU 00H ; 01H --------- Timer0 Data Register TMR0 EQU 01H Pr_TMR0_Data EQU 01H ; 02H --------- Low Byte of Program Counter PCL EQU 02H Pr_PCLow_Data EQU 02H ; 03H --------- Status Register STATUS EQU 03H Pr_Status EQU 03H ; BK[1] BK[0] GP5 /WDT_TO /Sleep Z Half_C C ; 04H --------- File Selection Register (Include SRAM Bank Select) FSR EQU 04H Pr_File_Sel EQU 04H ; GP7 FSR[6] FSR[5] FSR[4] FSR[3] FSR[2] FSR[1] FSR[0] ; 05H --------- PortA Data Register PORTA EQU 05H Pr_PA_Data EQU 05H ; 06H --------- PortB Data Register PORTB EQU 06H Pr_PB_Data EQU 06H ; 07H --------- PortC Data Register PORTC EQU 07H Pr_PC_Data EQU 07H ; 08H --------- Power Control Register (WatchDog,LVD and LVR Control,/PA[5]: Pull-High) PCON EQU 08H Pr_PWR_Ctrl EQU 08H ; WDTEn GP6 LVDEn /PA[5] LVREn GP2 GP1 GP0 ; 09H --------- PortB Wakeup Control Register BWUCON EQU 09H Pr_PB_WakeUp_Ctrl EQU 09H ; PB[7] PB[6] PB[5] PB[4] PB[3] PB[2] PB[1] PB[0] ; 0AH --------- High Byte of Program Counter (B'xxxxxDDD') PCHBUF EQU 0AH Pr_PCHigh_Data EQU 0AH ; DCMEN XSPD_STP - - - PCHBUF[2] PCHBUF[1] PCHBUF[0] ; 0BH --------- PortA/B Pull-Low Control Register ABPLCON EQU 0BH Pr_PAB_PL_Ctrl EQU 0BH ; /PB[3] /PB[2] /PB[1] /PB[0] /PA[3] /PA[2] /PA[1] /PA[0] ; 0CH --------- PortB Pull-High Control Register BPHCON EQU 0CH Pr_PB_PH_Ctrl EQU 0CH ; /PB[7] /PB[6] /PB[5] /PB[4] /PB[3] /PB[2] /PB[1] /PB[0] ; 0DH --------- PortC Pull-High Control Register CPHCON EQU 0DH Pr_PC_PH_Ctrl EQU 0DH ; - - - - - - /PC[1] /PC[0] ; 0EH --------- Interrupt Enable Register INTE EQU 0EH Pr_INT_Ctrl EQU 0EH ; ExtINT1 WDT TMR2 LVDIE TMR1 ExtINT0 PABKey TMR0 ; 0FH --------- Interrupt Flag (Write '0' to Clear Flag) INTF EQU 0FH Pr_INT_Flag EQU 0FH ; ExtINT1 WDT TMR2 LVDIF TMR1 ExtINT0 PABKey TMR0 ; 10H --------- ADC mode Register ADMD EQU 10H Pr_ADC_ADMD EQU 10H ; ADEN ADC_START ADC_EOC ADC_CHEN AD_CHSel[3] AD_CHSel[2] AD_CHSel[1] AD_CHSel[0] ; 11H --------- ADC clock, ADC interrupt flag and ADC low 4-bit data output Register ADR EQU 11H Pr_ADC_ADR EQU 11H ; ADIF ADIE AD_ClK[1] AD_ClK[0] AD_Data[3] AD_Data[2] AD_Data[1] AD_Data[0] ; 12H --------- ADC output data Register (ADC high 8-bit data output Register) ADD EQU 12H Pr_ADC_Data EQU 12H ; AD_Data[11] AD_Data[10] AD_Data[9] AD_Data[8] AD_Data[7] AD_Data[6] AD_Data[5] AD_Data[4] ; 13H --------- ADC high reference voltage Register ADVREFH EQU 13H Pr_ADC_Vrefh EQU 13H ; AD_VREFH - - - - - AD_VSel[1] AD_VSel[0] ; 14H --------- ADC Sampling pulse width and ADC conversion bit Register and AIN pin control Register ADCR EQU 14H Pr_ADC_ADCR EQU 14H ; PB[7] PB[6] PB[5] PB[4] AD_SAMP[1] AD_SAMP[0] AD_BIT[1] AD_BIT[0] ; 15H --------- PortA Wakeup Control Register AWUCON EQU 15H Pr_PA_WakeUp_Ctrl EQU 15H ; PA[7] PA[6] PA[5] PA[4] PA[3] PA[2] PA[1] PA[0] ; 16H --------- AIN pin control Register PACON EQU 16H Pr_AIN_Ctrl EQU 16H ; PB[3] PB[2] PB[1] PA[4] PA[3] PA[2] PA[1] PA[0] ; 17H --------- Reserved ; 18H --------- External Interrupt Contorl Register INTEDG EQU 18H Pr_EXINT_Ctrl EQU 18H ; INT2_Edg ExINT2En ExINT1En ExINT0En INT1_Edg[1] INT1_Edg[0] INT0_Edg[1] INT0_Edg[0] ; 19H --------- TIMER1/2 Data and PWMDUTY1/2 msb 2 bits Register TMRH EQU 19H Pr_TMR_Data_PWM EQU 19H ; TMR2_DATA9 TMR2_DATA8 TMR1_DATA9 TMR1_DATA8 PWM2_DUTY9 PWM2_DUTY8 PWM1_DUTY9 PWM1_DUTY8 ; 1AH --------- Voltage comparator Control Register ANAEN EQU 1AH Pr_CMP_PWR_Ctrl EQU 1AH ; CMPEN - - - - - - - ; 1BH --------- Resistor to Frequency Converter Control Register RFC EQU 1BH Pr_RFC_Ctrl EQU 1BH ; RFCEN - - - PADSel[3] PADSel[2] PADSel[1] PADSel[0] ; 1CH --------- TIMER3 Data and PWMDUTY3 msb 2 bits Register TM3RH EQU 1CH Pr_TMR3_Data_PWM EQU 1CH ; - - TMR3_DATA9 TMR3_DATA8 - - PWM3_DUTY9 PWM3_DUTY8 ; 1DH --------- I_HRC frequency Trim High Byte OSCCALH EQU 1DH Pr_IHRC_Freq_High EQU 1DH ; - - - - - OSC10 OSC9 OSC8 ; 1EH --------- I_HRC frequency Trim Low Byte OSCCALL EQU 1EH Pr_IHRC_Freq_Low EQU 1EH ; OSC7 OSC6 OSC5 OSC4 OSC3 OSC2 OSC1 OSC0 ; 1FH --------- Interrupt2 Enable Register INTE2 EQU 1FH Pr_INT2_Ctrl EQU 1FH ; INT2IF - - T3IF INT2IE - - T3IE ;----------------------------------------------------------------------------------------------------------------------- ;T0MD and T0MDR instrutions for access T0MD Register ;----------------------------------------------------------------------------------------------------------------------- ; xxH --------- Timer0 Control Register (Only Accessed by Instruction T0MD / T0MDR) ;T0MD EQU xxH ; LClkSrc GP6 ClkSel EdgeSel PS0WDT PS0Div[2] PS0Div[1] PS0Div[0] ;P_TMR0_Ctrl ;----------------------------------------------------------------------------------------------------------------------- ;IOST and IOSTR instrution for access F-page Register (IO Configuration Register) ;----------------------------------------------------------------------------------------------------------------------- ;F-page registers ; bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 ;----------------------------------------------------------------------------------------------------------------------- ; 05H --------- PortA Direction(1:Input/0:Output) Control Register IOSTA EQU 05H Pf_PA_Dir_Ctrl EQU 05H ; 06H --------- PortB Direction(1:Input/0:Output) Control Register IOSTB EQU 06H Pf_PB_Dir_Ctrl EQU 06H ; 07H --------- PortC Direction(1:Input/0:Output) Control Register IOSTC EQU 07H Pf_PC_Dir_Ctrl EQU 07H ; 08H --------- Reserved ; 09H --------- PortA Pull-High Control Register (/PA[5]: Pull-Low) APHCON EQU 09H Pr_PA_PH_Ctrl EQU 09H ; /PA[7] /PA[6] /PA[5] /PA[4] /PA[3] /PA[2] /PA[1] /PA[0] ; 0AH --------- Prescaler0 Counter Value Register PS0CV EQU 0AH Pf_PS0_Cnt EQU 0AH ; 0BH --------- PortC Pull-Low Control Register CPLCON EQU 0BH Pr_PC_PL_Ctrl EQU 0BH ; - - - - - - /PC[1] /PC[0] ; 0CH --------- PortB Open-Drain Control Register BODCON EQU 0CH Pf_PB_OD_Ctrl EQU 0CH ; PB[7] PB[6] PB[5] PB[4] PB[3] PB[2] PB[1] PB[0] ; 0DH --------- PortC Open-Drain Control Register CODCON EQU 0DH Pf_PC_OD_Ctrl EQU 0DH ; - - - - - - PC[1] PC[0] ; 0EH --------- Comparator voltage select Control Register CMPCR EQU 0EH Pf_CMP_Ctrl EQU 0EH ; PS3 PS2 PS1 PS0 VS3