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TI-TS3L500.pdf
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SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Wide Bandwidth (BW > 1100 MHz Typ)
D Low Crosstalk (X
TALK
= −37 dB Typ)
D Low Bit-to-Bit Skew (t
sk(o)
= 100 ps Max)
D Low and Flat ON-State Resistance
(r
on
= 4 Typ, r
on(flat)
= 0.5 Typ)
D Low Input/Output Capacitance
(C
ON
= 8 pF Typ)
D Rail-to-Rail Switching on Data I/O Ports
(0 to 5 V)
D V
CC
Operating Range From 3 V to 3.6 V
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 1000-V Charged-Device Model (C101)
D Applications
− 10/100/1000 Base-T Signal Switching
− Differential (LVDS, LVPECL) Signal
Switching
− Audio/Video Switching
− Hub and Router Signal Switching
description/ordering information
The TS3L500 is a 16-bit to 8-bit multiplexer/
demultiplexer LAN switch with a single select
(SEL) input. SEL controls the data path of the
multiplexer/demultiplexer. The device provides
additional I/Os for switching status indicating LED
signals.
The device provides a low and flat ON-state resistance (r
on
) and an excellent ON-state resistance match. Low
input/output capacitance, high bandwidth, low skew, and low crosstalk among channels make this device
suitable for various LAN applications, such as 10/100/1000 Base-T.
This device can be used to replace mechanical relays in LAN applications. It also can be used to route signals
from a 10/100 Base-T ethernet transceiver to the RJ-45 LAN connectors in laptops or in docking stations.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 85°C TQFN Tape and reel TS3L500RHUR TK500
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright 2006, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TQFN PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
45
21
22
23
24
25
26
27
28
31
30
29
49
50
51
56
55
54
53
52
40
39
38
37
36
35
34
33
32
44
43
42
41
48
46
47
GND
A
0
A
1
V
CC
NC
GND
A
2
A
3
GND
V
CC
A
4
A
5
GND
A
6
A
7
GND
SEL
V
CC
LED
0
LED
1
0B
1
1B
1
0B
2
1B
2
GND
2B
1
3B
1
2B
2
3B
2
GND
V
CC
4B
1
5B
1
4B
2
5B
2
GND
6B
1
7B
1
6B
2
7B
2
V
CC
GND
LED
2
GND
2LED
1
2LED
2
V
CC
GND
GND
0LED
1
1LED
1
GND
0LED
2
1LED
2
V
CC
GND
! " #$%! " &$'(#! )!%*
)$#!" # ! "&%##!" &% !+% !%" %," "!$%!"
"!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)%
!%"!/ (( &%!%"*
![](https://csdnimg.cn/release/download_crawler_static/87302481/bg2.jpg)
SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
INPUT
INPUT/OUTPUT
FUNCTION
INPUT
SEL
INPUT/OUTPUT
A
n
FUNCTION
L nB
1
A
n
= nB
1
, LED
x
= XLED
1
H nB
2
A
n
= nB
2
, LED
x
= XLED
2
PIN DESCRIPTION
NAME DESCRIPTION
A
n
Data I/O
nB
m
Data I/O
SEL Select input
LED
x
LED I/O port
XLED
m
LED I/O port
![](https://csdnimg.cn/release/download_crawler_static/87302481/bg3.jpg)
SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
0LED
1
1LED
1
A
0
0B
1
0B
2
SEL
2
48
46
17
1B
2
45
A
1
1B
1
3
47
A
2
2B
1
2B
2
7
43
41
3B
2
40
A
3
3B
1
8
42
A
4
4B
1
4B
2
11
37
35
5B
2
34
A
5
5B
1
12
36
A
6
6B
1
6B
2
14
32
30
7B
2
29
A
7
7B
1
15
31
LED
0
LED
2
0LED
2
1LED
2
2LED
1
2LED
2
19
20
54
LED
1
22
25
23
52
51
26
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