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TI-SN54LVC646A-SP.pdf
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TI-SN54LVC646A-SP.pdf
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1
FEATURES
CLKAB
SAB
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
B8
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
WPACKAGE
(TOP VIEW)
DESCRIPTION/ORDERING INFORMATION
SN54LVC646A-SP
www.ti.com
............................................................................................................................................................................................. SCAS865 – OCTOBER 2008
RAD-TOLERANT CLASS V OCTAL BUS TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
• Operates From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max t
pd
of 7.4 ns at 3.3 V
• Typical V
OLP
(Output Ground Bounce)
< 0.8 at V
CC
= 3.3 V, T
A
= 25 ° C
• Typical V
OHV
(Output V
OH
Undershoot)
>2 V at V
CC
= 3.3 V, T
A
= 25 ° C
• Supports Mixed-Mode Signal Operation on All
Ports (5-V Input/Output Voltage With
3.3-V V
CC
)
• I
off
Supports Partial Power-Down-Mode
Operation
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
• Rad Tolerant: 50kRad (Si) TID
(1)
– TID Dose Rate 0.10 rad/s
• QML-V Qualified, SMD 5962-97626
(1) Radiation tolerance is a typical value based upon initial device
qualification. Radiation Lot Acceptance Testing is available –
contact factory for details.
The SN54LVC646A octal bus transceiver and register is designed for 2.7-V to 3.6-V V
CC
operation.
This device consists of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked
into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 shows
the four fundamental bus-management functions that are performed with the SN54LVC646A device.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
– 55 ° C to 125 ° C CFP – W Tube of 85 5962-9762601VKA 5962-9762601VKA
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
SN54LVC646A-SP
SCAS865 – OCTOBER 2008 .............................................................................................................................................................................................
www.ti.com
Output-enable ( OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode,
data present at the high-impedance port is stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR
determines which bus receives data when OE is low. In the isolation mode ( OE high), A data is stored in one
register and B data can be stored in the other register.
When an output function is disabled, the input function still is enabled and can be used to store and transmit
data. Only one of the two buses, A or B, can be driven at a time.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in
a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
INPUTS DATA I/O
OPERATION OR
FUNCTION
OE DIR CLKAB CLKBA SAB SBA A1 – A8 B1 – B8
X X ↑ X X X Input Unspecified
(1)
Store A, B unspecified
(1)
X X X ↑ X X Unspecified
(1)
Input Store B, A unspecified
(1)
H X ↑ ↑ X X Input Input Store and B data
H X H or L H or L X X Input disabled Input disabled Isolation, hold storage
L L X X X L Output Input Real-time B data to A bus
L L X H or L X H Output Input Stored B data to A bus
L H X X L X Input Output Real-time A data to B bus
L H H or L X H X Input Output Stored A data to B bus
(1) The data-output functions can be enabled or disabled by various signals at OE and DIR. Data-input functions always are enabled; i.e.,
data at the bus terminals is stored on every low-to-high transition of the clock inputs.
2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC646A-SP
21
L
3
DIR
L
1
CLKAB
X
23
CLKBA
X
2
SAB
X
22
SBA
L
21
L
3
DIR
H
1
CLKAB
X
23
CLKBA
X
2
SAB
L
22
SBA
X
21
X
3
DIR
X
1
CLKAB
23
CLKBA
X
2
SAB
X
22
SBA
X
21
L
3
DIR
L
1
CLKAB
X
23
CLKBA
H or L
2
SAB
X
22
SBA
H
X
H
X
X
X X
X
X
X
L H H or L X H X
↑
↑
↑↑
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
OE OE
OEOE
REAL-TIME TRANSFER
BUS B TO BUS A
REAL-TIME TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A AND/OR B
SN54LVC646A-SP
www.ti.com
............................................................................................................................................................................................. SCAS865 – OCTOBER 2008
Figure 1. Bus-Management Functions
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): SN54LVC646A-SP
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