1
Data sheet acquired from Harris Semiconductor
SCHS280C
Features
• Multifunction Capability
- Binary to 1-of-16 Decoder
- 1-to-16 Line Demultiplexer
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
Pinout
CD54HC4514
(CERDIP)
CD74HC4514, CD74HC4515
(PDIP, SOIC)
TOP VIEW
Description
The CD54HC4514, CD74HC4514, and CD74HC4515 are
high-speed silicon gate devices consisting of a 4-bit strobed
latch and a 4- to 16-line decoder. The selected output is
enabled by a low on the enable input (
E). A high on E inhibits
selection of any output. Demultiplexing is accomplished by
using the
E input as the data input and the select inputs (A0-
A3) as addresses. This
E input also serves as a chip select
when these devices are cascaded.
When Latch Enable (
LE) is high the output follows changes
in the inputs (see truth table). When
LE is low the output is
isolated from changes in the input and remains at the level
(high for the 4514, low for the 4515) it had before the latches
were enabled. These devices, enhanced versions of the
equivalent CMOS types, can drive 10 LSTTL loads.
1
2
3
4
5
6
7
8
9
10
11
12
LE
A0
A1
Y7
Y6
Y5
Y4
Y3
Y1
Y2
Y0
GND
16
17
18
19
20
21
22
23
24
15
14
13
V
CC
A3
A2
Y10
Y11
Y9
Y15
Y12
Y13
E
Y8
Y14
Ordering Information
PART NUMBER TEMP. RANGE (
o
C) PACKAGE
CD54HC4514F3A -55 to 125 24 Ld CERDIP
CD74HC4514E -55 to 125 24 Ld PDIP
CD74HC4514EN -55 to 125 24 Ld PDIP
CD74HC4514M -55 to 125 24 Ld SOIC
CD74HC4514M96 -55 to 125 24 Ld SOIC
CD74HC4515E -55 to 125 24 Ld PDIP
CD74HC4515EN -55 to 125 24 Ld PDIP
CD74HC4515M -55 to 125 24 Ld SOIC
CD74HC4515M96 -55 to 125 24 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel.
November 1997 - Revised July 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC4514, CD74HC4514,
CD74HC4515
High-Speed CMOS Logic 4- to 16-Line
Decoder/Demultiplexer with Input Latches
[ /Title
(CD74
HC451
4,
CD74
HC451
5)
/
Sub-
j
ect
(High
Speed
CMOS
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