TI-UCC27211A.pdf

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TI-UCC27211A datasheet 本文档为TI-UCC27211A datasheet的详细解读，涵盖了该器件的特性、应用、电气特性、封装信息等方面。 特性 UCC27211A是一款高频、高侧和低侧驱动器，具有以下特性： * 可以驱动两个N沟道金属氧化物半导体场效应晶体管（MOSFET） * 最大引导电压为120V * 峰值输出电流为4A * 上拉和下拉电阻为0.9Ω * 输入引脚能够耐受-10V至+20V的电压 * 晶体管-晶体管逻辑电路（TTL）或伪CMOS兼容输入版本 * 运行电压范围为8V至17V * 上升时间和下降时间分别为7.2ns和5.5ns * 快速传播延迟时间为20ns * 延迟匹配为4ns * 支持对称欠压锁定功能 * 支持全部行业标准封装 应用 UCC27211A器件常用于电信、数据通信和商用的电源、半桥和全桥转换器、推挽转换器、高电压同步降压型转换器、两开关正激式转换器、有源箝位正激式转换器和D类音频放大器等领域。 电气特性 UCC27211A器件的电气特性如下： * supply Voltage：-10V至+20V * Propagation Delay：7.2ns * Rise and Fall Time：5.5ns * Output Current：4A * Input Voltage：-10V至+20V * Operating Temperature Range：-40℃至+140℃ 封装信息 UCC27211A器件提供多种封装选项，包括SOIC-8、4mm×4mm小外形尺寸无引线（SON）-8封装、4mm×4mm小外形尺寸无引线（SON）-10封装等。 应用图 在应用中，UCC27211A器件可以与MOSFET配合使用，以驱动高频、高侧和低侧的电压和电流。其 inputs 可以直接处理-10VDC的电压，提高了稳健耐用性。 结论 UCC27211A datasheet为用户提供了该器件的详细信息，包括特性、应用、电气特性、封装信息等方面，帮助用户更好地了解和使用该器件。
0
4
8
12
16
20
24
28
32
8 12 16 20
Supply Voltage (V)
Propagation Delay (ns)
TDLRR
TDLFF
TDHRR
TDHFF
PWM
CONTROLLER
+12V
ISOLATION
AND
FEEDBACK
+100V
SECONDARY
SIDE
CIRCUIT
HI
CONTROL
DRIVE
LO
DRIVE
HI
V
DD
UCC27211A
VSS
LI
HB
HO
HS
LO
UDG-13114
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Design
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLUSBL4
UCC27211A
ZHCSBI9C –AUGUST 2013–REVISED OCTOBER 2015
UCC27211A 120V 升升压压 4A 峰峰值值电电流流的的高高频频高高侧侧和和低低侧侧驱驱动动器器
1
1 特特性性
1
• 可通过独立输入驱动两个采用高侧/低侧配置的 N
沟道金属氧化物半导体场效应晶体管 (MOSFET)
• 最大引导电压 120V 直流
• 4A 吸收，4A 源输出电流
• 0.9Ω 上拉和下拉电阻
• 输入引脚能够耐受 –10V 至 +20V 的电压，并且与
电源电压范围无关
• 晶体管-晶体管逻辑电路 (TTL) 或伪 CMOS 兼容输
入版本
• 8V 至 17V VDD 运行范围（绝对最大值 20V）
• 7.2ns 上升时间和 5.5ns 下降时间（采用 1000pF
负载时）
• 快速传播延迟时间（典型值 20ns）
• 4ns 延迟匹配
• 用于高侧和低侧驱动器的对称欠压锁定功能
• 支持全部行业标准封装
– SOIC-8
– 4mm × 4mm 小外形尺寸无引线 (SON)-8 封装
– 4mm × 4mm 小外形尺寸无引线 (SON)-10 封装
• －40℃ 至 +140°C 的额定温度范围
2 应应用用
• 针对电信，数据通信和商用的电源
• 半桥和全桥转换器
• 推挽转换器
• 高电压同步降压型转换器
• 两开关正激式转换器
• 有源箝位正激式转换器
• D 类音频放大器
3 说说明明
UCC27211A 器件驱动器基于广受欢迎的 UCC27201
MOSFET 驱动器；但该器件相比之下具有显著的性能
提升。
峰值输出上拉和下拉电流已经被提高至 4A 拉电流和
4A 灌电流，并且上拉和下拉电阻已经被减小至 0.9Ω，
因此可以在 MOSFET 的米勒效应平台转换期间用尽可
能小的开关损耗来驱动大功率 MOSFET。输入结构能
够直接处理 -10 VDC，这提高了稳健耐用性，并且无
需使用整流二极管即可实现与栅极驱动变压器的直接对
接。此输入与电源电压无关，并且具有 20V 的最大额
定值。
器器件件信信息息
(1)
器器件件型型号号 封封装装 封封装装尺尺寸寸（（标标称称值值））
UCC27211A
SOIC (8) 4.90mm x 3.91mm
VSON (8) 4.00mm x 4.00mm
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
典典型型应应用用图图 传传播播延延迟迟与与电电源源电电压压间间的的关关系系
(T = 25°C)
2
UCC27211A
ZHCSBI9C –AUGUST 2013–REVISED OCTOBER 2015
www.ti.com.cn
Copyright © 2013–2015, Texas Instruments Incorporated
目目录录
1 特特性性.......................................................................... 1
2 应应用用.......................................................................... 1
3 说说明明.......................................................................... 1
4 修修订订历历史史记记录录 ........................................................... 2
5 说说明明 （（续续））.............................................................. 2
6 Pin Configuration and Functions......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 5
7.5 Electrical Characteristics........................................... 5
7.6 Switching Characteristics.......................................... 6
7.7 Typical Characteristics.............................................. 7
8 Detailed Description ............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 11
8.3 Feature Description................................................. 11
8.4 Device Functional Modes........................................ 12
9 Application and Implementation ........................ 13
9.1 Application Information............................................ 13
9.2 Typical Application .................................................. 13
10 Power Supply Recommendations ..................... 18
11 Layout................................................................... 18
11.1 Layout Guidelines ................................................. 18
11.2 Layout Example .................................................... 19
11.3 Thermal Considerations........................................ 19
12 器器件件和和文文档档支支持持 ..................................................... 20
12.1 社区资源................................................................ 20
12.2 商标 ....................................................................... 20
12.3 静电放电警告......................................................... 20
12.4 Glossary................................................................ 20
13 机机械械、、封封装装和和可可订订购购信信息息....................................... 20
4 修修订订历历史史记记录录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision B (September 2013) to Revision C Page
• 已添加 ESD
额定值
表，
特性 描述
部分，
器件功能模式
，
应用和实施
部分，
电源相关建议
部分，
布局
部分，
器件和文
档支持
部分，以及
机械、封装和可订购信息
部分 .................................................................................................................... 1
• 已更改 通篇的 PowerPAD 至散热焊盘 ................................................................................................................................... 1
• 已从数据表中删除 UCC27210A 器件...................................................................................................................................... 1
Changes from Revision A (August 2013) to Revision B Page
• 已更改 销售状态，从“产品预览”改为“量产数据”...................................................................................................................... 1
Changes from Original (August 2013) to Revision A Page
• Added Note 2 to the Terminal Functions Table...................................................................................................................... 3
• Changed Repetitive pulse data from –18 V to –(24 V – VDD)............................................................................................... 4
• Added additional details to Note 2.......................................................................................................................................... 4
• Changed Voltage on HS, V
HS
(repetitive pulse < 100 ns) data from –15 to –(24 V – VDD).................................................. 4
5 说说明明 （（续续））
UCC27211A 的开关节点（HS 引脚）最高可处理 –18V 电压，从而保护高侧通道不受寄生电感和杂散电容所固有
的负电压影响。UCC27210A（伪 CMOS 输入）和 UCC27211A (TTL inputs) 已经增加了滞后特性，从而使得用于
模拟或数字脉宽调制 (PWM) 控制器的接口具有增强的抗扰度。
低端和高端栅极驱动器是独立控制的，并在彼此的接通和关断之间实现了至 2ns 的匹配。
由于在芯片上集成了一个额定电压为 120V 的自举二极管，因此无需采用外部分立式二极管。高侧和低侧驱动器均
配有欠压锁定功能，可提供对称的导通和关断行为，并且能够在驱动电压低于指定阈值时将输出强制为低电平。
UCC27211A 器件采用 8 引脚 SOIC (D) 和 8 引脚 VSON (DRM) 封装8 引脚 SO-PowerPAD 封装。
1
2
3
4
8
7
6
5
VDD
HB
HO
HS
LO
VSS
LI
HI
1
2
3
4
8
7
6
5
VDD
HB
HO
HS
VSS
Exposed
Thermal
Die Pad *
LO
LI
HI
3
UCC27211A
www.ti.com.cn
ZHCSBI9C –AUGUST 2013–REVISED OCTOBER 2015
Copyright © 2013–2015, Texas Instruments Incorporated
6 Pin Configuration and Functions
D Package
8-Pin SOIC
Top View
DRM Package
8-Pin VSON
Top View
(1) HI or LI input is assumed to connect to a low impedance source signal. The source output impedance is assumed less than 100 Ω. If the
source impedance is greater than 100 Ω, add a bypassing capacitor, each, between HI and VSS and between LI and VSS. The added
capacitor value depends on the noise levels presented on the pins, typically from 1 nF to 10 nF should be effective to eliminate the
possible noise effect. When noise is present on two pins, HI or LI, the effect is to cause HO and LO malfunctions to have wrong logic
outputs.
(2) For cold temperature applications TI recommends the upper capacitance range. Follow the Layout Guidelines for PCB layout.
(3) The thermal pad is not directly connected to any leads of the package; however, it is electrically and thermally connected to the
substrate which is the ground of the device.
Pin Functions
PIN
TYPE DESCRIPTION
NAME NO.
HB 2 P
High-side bootstrap supply. The bootstrap diode is on-chip but the external bootstrap capacitor is
required. Connect positive side of the bootstrap capacitor to this pin. Typical range of HB bypass
capacitor is 0.022 µF to 0.1 µF. The capacitor value is dependant on the gate charge of the high-
side MOSFET and must also be selected based on speed and ripple criteria.
HI 5 I High-side input.
(1)
HO 3 O High-side output. Connect to the gate of the high-side power MOSFET.
HS 4 P
High-side source connection. Connect to source of high-side power MOSFET. Connect the
negative side of bootstrap capacitor to this pin.
LI 6 I Low-side input.
(1)
LO 8 O Low-side output. Connect to the gate of the low-side power MOSFET.
VDD 1 P
Positive supply to the lower-gate driver. De-couple this pin to V
SS
(GND). Typical decoupling
capacitor range is 0.22 µF to 4.7 µF (See
(2)
).
VSS 7 — Negative supply terminal for the device that is generally grounded.
Thermal pad
(3)
—
Used on the DRM package only. Electrically referenced to V
SS
(GND). Connect to a large
thermal mass trace or GND plane to dramatically improve thermal performance.
4
UCC27211A
ZHCSBI9C –AUGUST 2013–REVISED OCTOBER 2015
www.ti.com.cn
Copyright © 2013–2015, Texas Instruments Incorporated
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to VSS unless otherwise noted. Currents are positive into and negative out of the specified terminal.
(3) Verified at bench characterization. VDD is the value used in an application design.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
V
DD
(2)
,
V
HB
– V
HS
Supply voltage range –0.3 20 V
V
LI
, V
HI
Input voltages on LI and HI –10 20 V
V
LO
Output voltage on LO
DC –0.3 V
DD
+ 0.3
V
Repetitive pulse < 100 ns
(3)
–2 V
DD
+ 0.3
V
HO
Output voltage on HO
DC V
HS
– 0.3 V
HB
+ 0.3
V
Repetitive pulse < 100 ns
(3)
V
HS
– 2 V
HB
+ 0.3
V
HS
Voltage on HS
DC –1 115
V
Repetitive pulse < 100 ns
(3)
–(24 V – VDD) 115
V
HB
Voltage on HB –0.3 120 V
T
J
Operating virtual junction temperature range –40 150 °C
T
STG
Storage temperature –65 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.2 ESD Ratings
VALUE UNIT
V
(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2000
V
Charged-device model (CDM), per JEDEC specification JESD22-
C101
(2)
±1000
7.3 Recommended Operating Conditions
all voltages are with respect to V
SS
; currents are positive into and negative out of the specified terminal. –40°C < T
J
= T
A
<
140°C (unless otherwise noted)
MIN NOM MAX UNIT
V
DD
, V
HB
–
V
HS
Supply voltage range 8 12 17 V
V
HS
Voltage on HS –1 105 V
V
HS
Voltage on HS (repetitive pulse < 100 ns) –(24 V – VDD) 110 V
V
HB
Voltage on HB
V
HS
+ 8,
V
DD
– 1
V
HS
+ 17,
115
V
Voltage slew rate on HS 50 V/ns
Operating junction temperature –40 140 °C
5
UCC27211A
www.ti.com.cn
ZHCSBI9C –AUGUST 2013–REVISED OCTOBER 2015
Copyright © 2013–2015, Texas Instruments Incorporated
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.4 Thermal Information
THERMAL METRIC
(1)
UCC27211A
UNITD (SOIC) DRM (SON)
8 PINS 8 PINS
R
θJA
Junction-to-ambient thermal resistance 111.8 37.7 °C/W
R
θJC(top)
Junction-to-case (top) thermal resistance 56.9 47.2 °C/W
R
θJB
Junction-to-board thermal resistance 53.0 9.6 °C/W
ψ
JT
Junction-to-top characterization parameter 7.8 2.8 °C/W
ψ
JB
Junction-to-board characterization parameter 52.3 9.4 °C/W
R
θJC(bot)
Junction-to-case (bottom) thermal resistance n/a 3.6 °C/W
(1) Ensured by design.
7.5 Electrical Characteristics
V
DD
= V
HB
= 12 V, V
HS
= V
SS
= 0 V, no load on LO or HO, T
A
= T
J
= –40°C to 140°C, (unless otherwise noted)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
SUPPLY CURRENTS
I
DD
V
DD
quiescent current V(LI) = V(HI) = 0 V 0.05 0.085 0.17 mA
I
DDO
V
DD
operating current
UCC27210A f = 500 kHz, C
LOAD
= 0 2.1 2.6 6.5
mA
UCC27211A f = 500 kHz, C
LOAD
= 0 2.1 2.5 6.5
I
HB
Boot voltage quiescent current V(LI) = V(HI) = 0 V 0.015 0.065 0.1 mA
I
HBO
Boot voltage operating current f = 500 kHz, C
LOAD
= 0 1.5 2.5 5.1 mA
I
HBS
HB to V
SS
quiescent current V(HS) = V(HB) = 115 V 0.0005 1 µA
I
HBSO
HB to V
SS
operating current f = 500 kHz, C
LOAD
= 0 0.07 1.2 mA
INPUT
V
HIT
Input voltage threshold 1.9 2.3 2.7 V
V
LIT
Input voltage threshold 1.3 1.6 1.9 V
V
IHYS
Input voltage hysteresis 700 mV
R
IN
Input pulldown resistance 68 kΩ
UNDER-VOLTAGE LOCKOUT (UVLO)
V
DDR
V
DD
turnon threshold 6.2 7 7.8 V
V
DDHYS
Hysteresis 0.5 V
V
HBR
V
HB
turnon threshold 5.6 6.7 7.9 V
V
HBHYS
Hysteresis 1.1 V
BOOTSTRAP DIODE
V
F
Low-current forward voltage I
VDD-HB
= 100 µA 0.65 0.8 V
V
FI
High-current forward voltage I
VDD-HB
= 100 mA 0.85 0.95 V
R
D
Dynamic resistance, ΔVF/ΔI I
VDD-HB
= 100 mA and 80 mA 0.3 0.5 0.85 Ω
LO GATE DRIVER
V
LOL
Low-level output voltage I
LO
= 100 mA 0.05 0.1 0.19 V
V
LOH
High level output voltage I
LO
= –100 mA, V
LOH
= V
DD
– V
LO
0.1 0.16 0.29 V
Peak pullup current
(1)
V
LO
= 0 V 3.7 A
Peak pulldown current
(1)
V
LO
= 12 V 4.5 A
HO GATE DRIVER
V
HOL
Low-level output voltage I
HO
= 100 mA 0.05 0.1 0.19 V
V
HOH
High-level output voltage I
HO
= –100 mA, V
HOH
= V
HB
– V
HO
0.1 0.16 0.29 V
Peak pullup current
(1)
V
HO
= 0 V 3.7 A
Peak pulldown current
(1)
V
HO
= 12 V 4.5 A

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