<!--
This XML file (created on Sat Jul 15 12:39:54 2006) contains limited information
from the compilation of logic designs using Quartus II software (BUT NOT THE
LOGIC DESIGN FILES) that will be transmitted to Altera Corporation through
operation of the "TalkBack" feature. To enable/disable this feature, run
qtb_install.exe located in your quartus/bin folder. For more information, go
to license.txt.
-->
<talkback>
<ver>5.0</ver>
<schema>quartus_version_5.0_build_148.xsd</schema><license>
<nic_id>0007e977cc25</nic_id>
<cdrive_id>bc32e9a1</cdrive_id>
</license>
<tool>
<name>Quartus II</name>
<version>5.0</version>
<build>Build 148</build>
<module>quartus_fit.exe</module>
<edition>Full Version (Grace)</edition>
<compilation_end_time>Sat Jul 15 12:39:54 2006</compilation_end_time>
</tool>
<machine>
<os>Windows XP</os>
<cpu>
<proc_count>1</proc_count>
<cpu_freq units="MHz">2392</cpu_freq>
</cpu>
<ram units="MB">512</ram>
</machine>
<top_file>G:/work_room/PLD/Mars-7128-S Altera CPLD开发板/示例程序/VHDL/接口实验/i2c总线/i2c</top_file>
<resource_usage_summary>
<rsc name="Logic cells" util="98" max=" 128 " type="int">126 </rsc>
<rsc name="Registers" util="54" max=" 128 " type="int">70 </rsc>
<rsc name="Number of pterms used" type="int">431</rsc>
<rsc name="User inserted logic elements" type="int">0</rsc>
<rsc name="I/O pins" util="36" max=" 68 " type="int">25 </rsc>
<rsc name="-- Clock pins" util="50" max=" 2 " type="int">1 </rsc>
<rsc name="-- Dedicated input pins" util="50" max=" 2 " type="int">1 </rsc>
<rsc name="Global signals" type="int">2</rsc>
<rsc name="Shareable expanders" util="18" max=" 128 " type="int">24 </rsc>
<rsc name="Parallel expanders" util="30" max=" 120 " type="int">36 </rsc>
<rsc name="Cells using turbo bit" util="98" max=" 128 " type="int">126 </rsc>
<rsc name="Maximum fan-out node" type="text">clk</rsc>
<rsc name="Maximum fan-out" type="int">70</rsc>
<rsc name="Total fan-out" type="int">1549</rsc>
<rsc name="Average fan-out" type="float">8.85</rsc>
</resource_usage_summary>
<control_signals>
<row>
<name>clk</name>
<location>PIN_83</location>
<fan_out>70</fan_out>
<usage>Clock</usage>
<global>yes</global>
<global_resource_used>On</global_resource_used>
</row>
<row>
<name>rst</name>
<location>PIN_1</location>
<fan_out>70</fan_out>
<usage>Async. clear</usage>
<global>yes</global>
<global_resource_used>On</global_resource_used>
</row>
</control_signals>
<non_global_high_fan_out_signals>
<row>
<name>writeData_reg[3]</name>
<fan_out>13</fan_out>
</row>
<row>
<name>writeData_reg[1]</name>
<fan_out>14</fan_out>
</row>
<row>
<name>writeData_reg[2]</name>
<fan_out>13</fan_out>
</row>
<row>
<name>writeData_reg[0]</name>
<fan_out>13</fan_out>
</row>
<row>
<name>lpm_counter:cnt_scan_rtl_0|dffs[0]</name>
<fan_out>24</fan_out>
</row>
<row>
<name>lpm_counter:cnt_scan_rtl_0|dffs[1]</name>
<fan_out>12</fan_out>
</row>
<row>
<name>cnt_delay[19]</name>
<fan_out>12</fan_out>
</row>
<row>
<name>clk_div[1]</name>
<fan_out>11</fan_out>
</row>
<row>
<name>i2c_state[1]</name>
<fan_out>52</fan_out>
</row>
<row>
<name>lpm_counter:cnt_scan_rtl_0|dffs[2]</name>
<fan_out>11</fan_out>
</row>
</non_global_high_fan_out_signals>
<interconnect_usage_summary>
<rsc name="Output enables" util="16" max=" 6 " type="int">1 </rsc>
<rsc name="PIA buffers" util="68" max=" 288 " type="int">196 </rsc>
<rsc name="PIAs" util="79" max=" 288 " type="int">229 </rsc>
</interconnect_usage_summary>
<mep_data>
<command_line>quartus_fit --read_settings_files=off --write_settings_files=off i2c -c i2c</command_line>
</mep_data>
<software_data>
<smart_recompile>off</smart_recompile>
</software_data>
<fitter_settings>
<row>
<option>Device</option>
<setting>EPM7128SLC84-15</setting>
</row>
<row>
<option>Fitter Effort</option>
<setting>Standard Fit</setting>
<default_value>Auto Fit</default_value>
</row>
<row>
<option>Use smart compilation</option>
<setting>Off</setting>
<default_value>Off</default_value>
</row>
<row>
<option>Optimize Timing</option>
<setting>Normal compilation</setting>
<default_value>Normal compilation</default_value>
</row>
<row>
<option>Optimize IOC Register Placement for Timing</option>
<setting>On</setting>
<default_value>On</default_value>
</row>
<row>
<option>Limit to One Fitting Attempt</option>
<setting>Off</setting>
<default_value>Off</default_value>
</row>
<row>
<option>Fitter Initial Placement Seed</option>
<setting>1</setting>
<default_value>1</default_value>
</row>
<row>
<option>Slow Slew Rate</option>
<setting>Off</setting>
<default_value>Off</default_value>
</row>
</fitter_settings>
<fitter_device_options>
<row>
<option>Enable user-supplied start-up clock (CLKUSR)</option>
<setting>Off</setting>
</row>
<row>
<option>Enable device-wide reset (DEV_CLRn)</option>
<setting>Off</setting>
</row>
<row>
<option>Enable device-wide output enable (DEV_OE)</option>
<setting>Off</setting>
</row>
<row>
<option>Enable INIT_DONE output</option>
<setting>Off</setting>
</row>
<row>
<option>Configuration scheme</option>
<setting>Passive Serial</setting>
</row>
<row>
<option>Reserve all unused pins</option>
<setting>As input tri-stated</setting>
</row>
<row>
<option>Security bit</option>
<setting>Off</setting>
</row>
<row>
<option>Base pin-out file on sameframe device</option>
<setting>Off</setting>
</row>
</fitter_device_options>
<input_pins>
<row>
<name>clk</name>
<pin__>83</pin__>
<combinational_fan_out>70</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>yes</global>
<input_register>no</input_register>
<i_o_standard>TTL</i_o_standard>
<location_assigned_by>User</location_assigned_by>
</row>
<row>
<name>data_in[0]</name>
<pin__>24</pin__>
<lab>3</lab>
<combinational_fan_out>1</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<i_o_standard>TTL</i_o_standard>
<location_assigned_by>User</location_assigned_by>
</row>
<row>
<name>data_in[1]</name>
<pin__>22</pin__>
<lab>2</lab>
<combinational_fan_out>1</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<i_o_standard>TTL</i_o_standard>
<location_assigned_by>User</location_assigned_by>
</row>
<row>
<name>data_in[2]</name>
<pin__>21</pin__>
<lab>2</lab>
<combinational_fan_out>1</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<i_o_standard>TTL</i_o_standard>
<location_assigned_by>User</location_assigned_by>
</row>
<row>
<name>data_in[3]</name>
<pin__>20</pin__>
<lab>2</lab>
<combinational_fan_out>1</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<i_o_standard>TTL</i_o_standard>
<location_assigned_by>User</location_assigned_by>
</row>
<row>
<name>rd_input</name>
<pin__>36</pin__>
<lab>4</lab>
<combinational_fan_out>2</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<i_o_standard>TTL</i_o_standard>
<location_assigned_by>User</location_assigned_by>
</row>
<row>
<name>rst</name>
<pin__>1</pin__>
<combinational_fan_out>70</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>yes</global>
<input_register>no</input_register>
<i_o_standard>TTL</i_o_standard>
<location_assigned_by>User</location_assigned_by>
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i2c.rar_iic cpld_多iic器件
共97个文件
cdb:20个
hdb:18个
qmsg:9个
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2022-09-21
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IIC总线通讯接口器件的CPLD实现.一种简单、双向、二线制、同步串行总线。它只需两根线(串行时钟线和串行数据线)即可在连接于总线上的器件之间传送信息。该总线是高性能串行总线,具备多主机系统所需要的裁决和高低速设备同步等功能,应用极为广泛。
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i2c.rar (97个子文件)
i2c
i2c.asm.rpt 6KB
i2c.map.summary 242B
i2c.map.eqn 72KB
i2c.pin 15KB
i2c.qsf 2KB
i2c.fit.rpt 176KB
i2c.fit.eqn 74KB
db
i2c.map.cdb 18KB
i2c.pss 0B
prev_cmp_i2c.map.qmsg 2KB
add_sub_5ph.tdf 5KB
i2c.tan.qmsg 33KB
i2c.(10).cnf.cdb 6KB
i2c.dbp 0B
i2c.hif 16KB
i2c.sld_design_entry_dsc.sci 154B
i2c.(11).cnf.cdb 1KB
i2c.(7).cnf.cdb 602B
prev_cmp_i2c.tan.qmsg 33KB
i2c.(0).cnf.hdb 3KB
i2c.sgdiff.cdb 16KB
i2c.hier_info 3KB
i2c.(12).cnf.cdb 737B
i2c.pre_map.hdb 10KB
i2c.asm.qmsg 2KB
i2c.db_info 137B
i2c.rtlv_sg_swap.cdb 178B
i2c.(9).cnf.hdb 883B
i2c.(3).cnf.hdb 1KB
i2c.sld_design_entry.sci 154B
i2c.cbx.xml 267B
i2c.cmp.hdb 14KB
i2c.cmp.cdb 43KB
prev_cmp_i2c.qmsg 70KB
i2c.eco.cdb 161B
i2c.(12).cnf.hdb 454B
i2c.(4).cnf.cdb 973B
i2c.pre_map.cdb 17KB
i2c.(6).cnf.hdb 462B
i2c.map.qmsg 34KB
add_sub_5nh.tdf 3KB
i2c.fit.qmsg 2KB
i2c.(0).cnf.cdb 24KB
i2c.(7).cnf.hdb 451B
i2c.syn_hier_info 0B
i2c.cmp.rdb 20KB
i2c.cmp0.ddb 13KB
i2c.cmp.logdb 4B
i2c.(8).cnf.hdb 449B
i2c.(4).cnf.hdb 558B
add_sub_rnh.tdf 3KB
i2c.sgdiff.hdb 27KB
i2c.map.hdb 13KB
i2c.(5).cnf.cdb 973B
i2c_cmp.qrpt 0B
i2c.(3).cnf.cdb 6KB
add_sub_foh.tdf 5KB
i2c.(8).cnf.cdb 495B
i2c.(2).cnf.hdb 799B
i2c.rtlv_sg.cdb 17KB
prev_cmp_i2c.asm.qmsg 2KB
i2c.(5).cnf.hdb 558B
i2c.(1).cnf.cdb 3KB
i2c.(2).cnf.cdb 2KB
i2c.(6).cnf.cdb 523B
i2c.psp 0B
i2c.(9).cnf.cdb 3KB
prev_cmp_i2c.fit.qmsg 2KB
i2c.cmp.tdb 41KB
i2c.map.logdb 4B
i2c.rtlv.hdb 10KB
i2c.(1).cnf.hdb 723B
i2c.(11).cnf.hdb 533B
i2c.tis_db_list.ddb 174B
i2c.(10).cnf.hdb 1KB
i2c.done 26B
i2c.fit.summary 307B
cmp_state.ini 2B
i2c.bdf 1KB
i2c.qws 575B
i2c.qpf 943B
i2c.tan.rpt 74KB
i2c.pof 8KB
i2c.flow.rpt 4KB
iic.bdf 3KB
i2c.cdf 283B
i2c.vhd.bak 46KB
i2c_assignment_defaults.qdf 32KB
i2c.vhd 46KB
i2c.tan.summary 1KB
talkback
i2c.fit.talkback.xml 16KB
i2c.map.talkback.xml 6KB
i2c.tan.talkback.xml 2KB
i2c.asm.talkback.xml 4KB
i2c.bsf 3KB
i2c.map.rpt 32KB
i2c.dpf 239B
共 97 条
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