#include <reg51.H>
#define uchar unsigned char
#define uint unsigned int
#define ulong unsigned long
sbit PLL_CLK = P1^2;
sbit PLL_DATA = P1^3;
sbit PLL_LE = P1^4;
/*************************************************************************/
void PLL_writedata(unsigned long parameter)
{unsigned char a,j;
PLL_LE=0;
PLL_DATA=0;
for(j=0;j<21;j++)
{if((parameter&0x100000)==0x100000) //数据从高位R[23]到低位R[0]开始送数
{PLL_CLK=0;
for(a=0;a<10;a++) //延迟根据具体情况具体设置
{}
PLL_DATA=1;
for(a=0;a<4;a++)
{}
PLL_CLK=1;
}
else
{PLL_CLK=0;
for(a=0;a<10;a++)
{}
PLL_DATA=0;
for(a=0;a<4;a++)
{}
PLL_CLK=1;
}
parameter=parameter<<1;
}
for(a=0;a<5;a++)
{}
PLL_CLK=0;
for(a=0;a<15;a++)
{}
PLL_LE=1;
for(a=0;a<15;a++)
{}
PLL_LE=0;
}
/*************************************************************************/
ulong LMX2326_N_REG(ulong Lock_Freq)
{uint n_reg=0,n_reg_b=0;
uchar n_reg_a=0;
ulong N_REGISTER=0;
n_reg=Lock_Freq/12500; //n_reg=n_reg_a+n_reg_b*32,12500鉴相频率12.5K
n_reg_b=n_reg/32; //取整 是B值 //求余 是A值
n_reg_a=n_reg%32;
N_REGISTER=n_reg_b;
N_REGISTER=(N_REGISTER<<5)|n_reg_a;
N_REGISTER=(N_REGISTER<<2)|0x000001; //0x000001 ,GO BIT N[19]=0;0X100001,GO BIT N[19]=1
return(N_REGISTER);
}
void main(void)
{ulong reg;
PLL_writedata(0x1500);
PLL_writedata(LMX2326_N_REG(403000000));
PLL_writedata(0x0093); //0x0093 Digital Lock Detect;0x00c3 R Divider Output,;0x00a3 N Divider Output
PLL_writedata(0x0092); //0x0092 Digital Lock Detect;0x00c2 R Divider Output,;0x00a2 N Divider Output
}