SN8F5701S.zip_SN8F2728_SN8F5701_sonix_waitwj3

#include <SN8F5701.H> #define T0Mode0 (0<<0) //T0 mode0, 13-bit counter #define T0Mode1 (1<<0) //T0 mode1, 16-bit counter #define T0Mode2 (2<<0) //T0 mode2, 8-bit auto-reload counter #define T0Mode3 (3<<0) //T0 mode3, T0 two 8-bit counter/T1 no flag #define T0GATE (8<<0) //T0 gating clock by INT0 #define T0ClkFcpu (0<<0) //T0 clock source from Fcpu/12 #define T0ClkExt (4<<0) //T0 clock source from Fosc #define T0ExtFosc (0<<4) //T0 clock source from Fosc #define T1Mode0 (0<<4) //T1 mode0, 13-bit counter #define T1Mode1 (1<<4) //T1 mode1, 16-bit counter #define T1Mode2 (2<<4) //T1 mode2, 8-bit auto-reload counter #define T1Mode3 (3<<4) //T1 mode3, T1 stop #define T1GATE (8<<4) //T1 gating clock by INT1 #define T1ClkFcpu (0<<4) //T1 clock source from Fcpu/12 #define T1ClkExt (4<<4) //T1 clock source from Fosc #define PWM3En (1<<3) //Enable PWM5 output function #define PWM5En (1<<5) //Enable PWM5 output function int count0, count1, MS=100; int count_millis=0; uint8_t count_sec=0; uint8_t count_min=0; //void InitT0T1(void) //{ // // T0/T1_Initial // TH0 = (8192-5000) / 32; // TL0 = (8192-5000) % 32; // TH1 = (8192-5000) / 32; // TL1 = (8192-5000) % 32; // // T0 mode0 with gating clock by INT0, clock source from Fosc // TMOD |= T0Mode0 | T0ClkExt; // // T1 mode1, clock source from Fcpu/12 // TMOD |= T1Mode0 | T1ClkFcpu; // // T0 clock source = Fosc/32， T1 clock source = Fosc/32 // TCON0 |= 0x22; // // Timer 0/1 enable. Clear TF0/TF1 // TCON |= 0x5A; // // Enable T0/T1 interrupt // IEN0 |= 0x0A; // // Enable total interrupt // IEN0 |= 0x80; // count0 = 0x19; // count1 = 0x05; //} void InitT0T1(void) { // T0/T1_Initial TH0 = 0x00; TL0 = 0x00; TH1 = 0xFC; // 1mS = 0.001S TL1 = 0x18; // 0xFC18 = 64536，32MHz /32 = 1MHz，1M / 0.001 = 1000，65536(16bit計數)-1000 = 64536 // T0 mode0 with gating clock by INT0, clock source from Fosc TMOD |= T0Mode0 | T0ClkExt; // T1 mode1, TMOD |= T1Mode0 | T1ClkExt; // T0 clock source = Fosc/32， T1 clock source = Fosc/32 TCON0 |= 0x22; // Timer 0/1 enable. Clear TF0/TF1 TCON |= 0x5A; // Enable T0/T1 interrupt IEN0 |= 0x0A; // Enable total interrupt IEN0 |= 0x80; count0 = 100; count1 = 0x05; } void T0Interrupt(void) interrupt ISRTimer0 //0x0B { count0--; if(count0 >= 80) { //P05= 0x01; PWCH = PWM3En; // } else if (count0 == 0) { //P05= 0x00; PWCH = 0x00; // count0 = 100; } else { PWCH = 0x00; // } } void T1Interrupt(void) interrupt ISRTimer1 //0x0B { // P05= 0x01; // count_millis++; // if(count_millis==1000){ // count_sec++; // // count_millis=0; // } // if(count_sec==60){ // count_min++; // count_sec=0; // } // count0--; // if(count0 >= 180) // { // //P05= 0x01; // PWCH = PWM5En; // // } // else if (count0 == 0) // { // //P05= 0x00; // PWCH = 0x00; // // count0 = 200; // } // else // { // PWCH = 0x00; // // } //P05= ~P05; }