/*!
\file gd32f1x0_timer.c
\brief TIMER driver
*/
/*
Copyright (C) 2017 GigaDevice
2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
*/
#include "gd32f1x0_timer.h"
/*!
\brief deinit a timer
\param[in] timer_periph: TIMERx(x=0,1,2,5,13,14,15,16)
\param[out] none
\retval none
*/
void timer_deinit(uint32_t timer_periph)
{
switch(timer_periph){
case TIMER0:
/* reset TIMER0 */
rcu_periph_reset_enable(RCU_TIMER0RST);
rcu_periph_reset_disable(RCU_TIMER0RST);
break;
case TIMER1:
/* reset TIMER1 */
rcu_periph_reset_enable(RCU_TIMER1RST);
rcu_periph_reset_disable(RCU_TIMER1RST);
break;
case TIMER2:
/* reset TIMER2 */
rcu_periph_reset_enable(RCU_TIMER2RST);
rcu_periph_reset_disable(RCU_TIMER2RST);
break;
case TIMER5:
/* reset TIMER5 */
rcu_periph_reset_enable(RCU_TIMER5RST);
rcu_periph_reset_disable(RCU_TIMER5RST);
break;
case TIMER13:
/* reset TIMER13 */
rcu_periph_reset_enable(RCU_TIMER13RST);
rcu_periph_reset_disable(RCU_TIMER13RST);
break;
case TIMER14:
/* reset TIMER14 */
rcu_periph_reset_enable(RCU_TIMER14RST);
rcu_periph_reset_disable(RCU_TIMER14RST);
break;
case TIMER15:
/* reset TIMER15 */
rcu_periph_reset_enable(RCU_TIMER15RST);
rcu_periph_reset_disable(RCU_TIMER15RST);
break;
case TIMER16:
/* reset TIMER16 */
rcu_periph_reset_enable(RCU_TIMER16RST);
rcu_periph_reset_disable(RCU_TIMER16RST);
break;
default:
break;
}
}
/*!
\brief initialize TIMER counter
\param[in] timer_periph: TIMERx(x=0,1,2,5,13,14,15,16)
\param[in] initpara: init parameter struct
prescaler: prescaler value of the counter clock,0~65535
alignedmode: TIMER_COUNTER_EDGE,TIMER_COUNTER_CENTER_DOWN,TIMER_COUNTER_CENTER_UP,TIMER_COUNTER_CENTER_BOTH
counterdirection: TIMER_COUNTER_UP,TIMER_COUNTER_DOWN
period: counter auto reload value
clockdivision: TIMER_CKDIV_DIV1,TIMER_CKDIV_DIV2,TIMER_CKDIV_DIV4
repetitioncounter: counter repetition value,0~255
\param[out] none
\retval none
*/
void timer_init(uint32_t timer_periph, timer_parameter_struct* initpara)
{
/* configure the counter prescaler value */
TIMER_PSC(timer_periph) = (uint16_t)initpara->prescaler;
/* configure the counter direction and aligned mode */
if((TIMER0 == timer_periph) || (TIMER1 == timer_periph) || (TIMER2 == timer_periph)){
TIMER_CTL0(timer_periph) &= (uint32_t)(~ TIMER_CTL0_DIR|TIMER_CTL0_CAM);
TIMER_CTL0(timer_periph) |= (uint32_t)initpara->alignedmode;
TIMER_CTL0(timer_periph) |= (uint32_t)initpara->counterdirection;
}else{
TIMER_CTL0(timer_periph) &= (uint32_t)(~ TIMER_CTL0_DIR);
TIMER_CTL0(timer_periph) |= (uint32_t)initpara->counterdirection;
}
/* configure the autoreload value */
TIMER_CAR(timer_periph) = (uint32_t)initpara->period;
if((TIMER5 != timer_periph)){
/* reset the CKDIV bit */
TIMER_CTL0(timer_periph) &= (uint32_t)(~ TIMER_CTL0_CKDIV);
TIMER_CTL0(timer_periph) |= (uint32_t)initpara->clockdivision;
}
if((TIMER0 == timer_periph) || (TIMER14 == timer_periph) || (TIMER15 == timer_periph)|| (TIMER16 == timer_periph)){
/* configure the repetition counter value */
TIMER_CREP(timer_periph) = (uint32_t)initpara->repetitioncounter;
}
/* generate an update event */
TIMER_SWEVG(timer_periph) |= (uint32_t)TIMER_PSC_RELOAD_NOW;
}
/*!
\brief enable a timer
\param[in] timer_periph: TIMERx(x=0,1,2,5,13,14,15,16)
\param[out] none
\retval none
*/
void timer_enable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) |= (uint32_t)TIMER_COUNTER_ENABLE;
}
/*!
\brief disable a timer
\param[in] timer_periph: TIMERx(x=0,1,2,5,13,14,15,16)
\param[out] none
\retval none
*/
void timer_disable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) &= (uint32_t)TIMER_COUNTER_DISABLE;
}
/*!
\brief enable the auto reload shadow function
\param[in] timer_periph: TIMERx(x=0,1,2,5,13,14,15,16)
\param[out] none
\retval none
*/
void timer_auto_reload_shadow_enable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) |= (uint32_t) TIMER_ARSE_ENABLE;
}
/*!
\brief disable the auto reload shadow function
\param[in] timer_periph: TIMERx(x=0,1,2,5,13,14,15,16)
\param[out] none
\retval none
*/
void timer_auto_reload_shadow_disable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) &= (uint32_t) TIMER_ARSE_DISABLE;
}
/*!
\brief enable the update event
\param[in] timer_periph: TIMERx(x=0,1,2,5,13,14,15,16)
\param[out] none
\retval none
*/
void timer_update_event_enable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) |= (uint32_t) TIMER_UPDIS_ENABLE;
}
/*!
\brief disable the update event
\param[in] timer_periph: TIMERx(x=0,1,2,5,13,14,15,16)
\param[out] none
\retval none
*/
void timer_update_event_disable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) &= (uint32_t) TIMER_UPDIS_DISABLE;
}
/*!
\brief set TIMER counter alignment mode
\param[in] timer_periph: TIMERx(x=0,1,2)
\param[in] aligned:
\arg TIMER_COUNTER_EDGE: edge-aligned mode
\arg TIMER_COUNTER_CENTER_DOWN: center-aligned and counting down assert mode
\arg TIMER_COUNTER_CENTER_UP: center-aligned and counting up assert mode
\arg TIMER_COUNTER_CENTER_BOTH: center-aligned and counting up/down assert mode
\param[out] none
\retval none
*/
void timer_counter_alignment(uint32_t timer_periph, uint16_t aligned)
{
TIMER_CTL0(timer_periph) &= (uint32_t)(~ TIMER_CTL0_CAM);
TIMER_CTL0(timer_periph) |= (uint32_t)aligned;
}
/*!
\brief set TIMER counter up direction
\param[in] timer_periph: TIMERx(x=0,1,2,5,13,14,15,16)
\param[out] none
\retval none
*/
void timer_counter_up_direction(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) &= (uint32_t)(~ TIMER_CTL0_DIR);
TIMER_CTL0(timer_periph) |= (uint32_t)TIMER_COUNTER_UP;
}
/*!
\brief set TIMER counter down direction
\param[in] timer_periph: TIMERx(x=0,1,2)
\param[out] none
\retval none
*/
void timer_counter_down_direction(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) &= (uint32_t)(~ TIMER_CTL0_DIR);
TIMER_CTL0(timer_periph) |= (uint32_t)TIMER_COUNTER_DOWN;
}
/*!
\brief configure TIMER prescaler
\param[in] timer_periph: TIMERx(x=0,1,2,5,13,14,15,16)
\param[in] prescaler: prescaler value
\param[in] pscreload: prescaler reload mode
\arg TIMER_PSC_RELOAD_NOW: the prescaler is loaded right now
\arg TIMER_PSC_RELOAD_UPDATE: the prescaler is loaded at the next update event
\param[out] none
\retval none
*/
void timer_prescaler_config(uint32_t timer_periph, uint16_t prescaler, uint8_t pscreload)
{
TIMER_PSC(timer_periph) = (uint32_t)prescaler;
if(TIMER_PSC_RELOAD_NOW == pscreload){
TIMER_SWEVG(timer_periph) |= (uint32_t)TIMER_SWEVG_UPG;
}
}
/*!
\brief configure TIMER repetition register value
\param[in] timer_periph: TIMERx(x=0,14,15,16)
\param[in] repetition: the counter repetition value
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GD32F130通过I2C读取LIS3DH三轴数据再转成角度数据完整工程.zip (89个子文件)
CarPoleLED
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CarPoleLED.bin 8KB
CarPoleLED.text 216KB
CarPoleLED.hex 23KB
Code
SysApp
wdg.h 314B
led.h 507B
lis3dh.h 20KB
iic.c 5KB
led.c 659B
lis3dh.c 57KB
wdg.c 1KB
iic.h 1KB
SysBsp
main.h 3KB
gd32f1x0_it.h 1KB
system_gd32f1x0.h 2KB
gd32f1x0_libopt.h 1KB
system_gd32f1x0.c 11KB
core_cmInstr.h 20KB
core_cm3.h 98KB
gd32f1x0_it.c 2KB
gd32f1x0.h 15KB
startup_gd32f1x0.s 14KB
main.c 973B
core_cmFunc.h 17KB
DevDriver
systick.c 2KB
usart.c 4KB
systick.h 299B
usart.h 814B
StdPeriph_Driver
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gd32f1x0_dac.h 11KB
gd32f1x0_gpio.h 25KB
gd32f1x0_cmp.h 14KB
gd32f1x0_syscfg.h 12KB
gd32f1x0_rtc.h 44KB
gd32f1x0_spi.h 21KB
gd32f1x0_fmc.h 12KB
gd32f1x0_wwdgt.h 3KB
gd32f1x0_opa.h 8KB
gd32f1x0_timer.h 55KB
gd32f1x0_rcu.h 65KB
gd32f1x0_misc.h 3KB
gd32f1x0_dma.h 16KB
gd32f1x0_exti.h 19KB
gd32f1x0_slcd.h 17KB
gd32f1x0_adc.h 23KB
gd32f1x0_crc.h 3KB
gd32f1x0_can.h 49KB
gd32f1x0_pmu.h 5KB
gd32f1x0_usart.h 34KB
gd32f1x0_i2c.h 22KB
gd32f1x0_fwdgt.h 5KB
gd32f1x0_cec.h 15KB
gd32f1x0_tsi.h 24KB
gd32f1x0_ivref.h 16KB
gd32f1x0_dbg.h 6KB
Source
gd32f1x0_syscfg.c 7KB
gd32f1x0_i2c.c 25KB
gd32f1x0_crc.c 4KB
gd32f1x0_wwdgt.c 3KB
gd32f1x0_slcd.c 14KB
gd32f1x0_dbg.c 4KB
gd32f1x0_ivref.c 4KB
gd32f1x0_spi.c 21KB
gd32f1x0_cec.c 15KB
gd32f1x0_exti.c 9KB
gd32f1x0_usart.c 36KB
gd32f1x0_fwdgt.c 4KB
gd32f1x0_timer.c 75KB
gd32f1x0_misc.c 6KB
gd32f1x0_pmu.c 7KB
gd32f1x0_fmc.c 17KB
gd32f1x0_rtc.c 34KB
gd32f1x0_tsi.c 15KB
gd32f1x0_rcu.c 42KB
gd32f1x0_opa.c 11KB
gd32f1x0_adc.c 26KB
gd32f1x0_can.c 32KB
gd32f1x0_gpio.c 10KB
gd32f1x0_dma.c 16KB
gd32f1x0_cmp.c 6KB
gd32f1x0_dac.c 18KB
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