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A Switched-Capacitor Programmable-Gain Amplifier for
High-Definition Video Analog Front-Ends
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ZHANG Hong, LI Xue, CHEN Yongliang, CHENG Jun
*
(School of Electronic and Information Engineering, Xi'an Jiaotong University, Xi’an 710049) 5
Foundations: Research Foundation for the Doctoral Program of Higher Education of China, Grant (No.
20090201120025).
Brief author introduction:Hong Zhang received the B.S. degree in electronic engineering in Xi’an University of
Technology in 2000 and the M.S. and Ph.. D. degrees from Xi’an Jiaotong University, Xi’an, China, in 2004 and
2008, respectively. Since 2008, He has been with the Department of Microelectronics, Xi’an Jiaotong University,
where he was an associate professor. His current research interests include high-speed, high-precision ADC, and
RFIC for broadband wireless communications. E-mail: hongzhang@mail.xjtu.edu.cn
Abstract: A switched-capacitor programmable gain amplifier (PGA) for high-definition video analog
front-ends (AFEs) is presented. The PGA also acts as the sample and holder of the ADC to reduce the
power consumption and chip area of the whole AFE. The 9-bit gain and offset control DACs are
embedded into the switched capacitor networks of the PGA. Simulated results show that the PGA
achieves a gain range of 0.9 to 2.4V/V, and an offset control range of -230 to 230mV while consuming
10
10.1mA from a 1.8V power supply. An AFE based on the proposed PGA is fabricated in TSMC
0.18um process. Measurement results show that the AFE achieves the capability to process variant
HDTV signals up to 1080p YPbPr and computer video signals up to UXGA (1600x1200 @75Hz).
Keywords: Analog IC design; PGA; Video; Analog front-end
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0 Introduction
Video analog front-end (AFE) circuits are essential components of video systems that process
analog video signals, such as RGB, YPbPr and S-Video[1]. In addition to the analog to digital
converters (ADCs), several important functions, such as clamping, gain and offset control, and
sync generation and clock recovery, must also be integrated in video AFEs to provide high-quality 20
digitized video signals[2], as given in Fig. 1.
Fig. 1. Typical structure of video AFE (sync generation and clock recovery modules are not shown).
The programmable-gain amplifier (PGA) in video AFE performs gain and offset control to 25
the input video signals firstly. Therefore, the qualities of the digitized video signals are dependent
primarily on the performances of the PGA. PGAs can be realized as independent blocks by a
high-performance opamp operating in continuous-time negative feedback [3]. However,
independent realization of PGAs consumes large power and chip area.
In this paper, a switched-capacitor PGA for high definition (HD) video AFEs fabricated in 30
TSMC 0.18μm CMOS process is presented. The proposed PGA also acts as the sample and holder
(SHA) of the ADCs to reduce the power consumption and chip area of the whole AFE. The
maximum sampling frequency of the PGA is 205MSPS to support applications of UXGA
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