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SOM-6869 COMe TYPE6
R140 2019’10’25
1
Contents
1 Introduction ........................................................................................................ 9
1.1 About This Document ..................................................................................... 9
1.2 Signal Table Terminology ............................................................................... 9
1.3 Terminology .................................................................................................... 10
1.4 Reference Documents .................................................................................... 14
1.5 Revision History .............................................................................................. 14
1.6 SOM-6869 Block Diagram .............................................................................. 15
2 COM Express Type 6 Interfaces........................................................................ 16
2.1 COM Express Type 6 Connector Layout ........................................................ 16
2.2 COM Express Type 6 Connector Pin-out ....................................................... 17
2.3 PCI Express .................................................................................................... 25
2.3.1 COM Express A-B Connector and C-D Connector PCIe Groups ............................... 25
2.3.2 General Purpose PCIe Signal Definitions .................................................................. 25
2.3.3 PCI Express Lane Configurations – Per COM Express Spec .................................... 30
2.3.4 PCI Express* General Routing Guidelines ................................................................ 31
2.3.4.1 PCI Express Insertion Loss Budget with Slot Card ......................................... 31
2.3.4.2 PCI Express Insertion Loss Budget with Carrier Board PCIE Device ............. 33
2.3.4.3 PCI Express Differential Transitional Via Recommendations ......................... 35
2.3.5 PCI Express* Trace Length Guidelines ..................................................................... 36
2.4 PEG (PCI Express Graphics) *SOM-6869 does not support PEG. ................ 38
2.4.1 PEG Signal Definitions .............................................................................................. 38
2.4.2 PEG* General Routing Guidelines ............................................................................ 44
2.4.2.1 PEG Differential Transitional Via Recommendations ..................................... 44
2.4.3 PEG* Trace Length Guidelines ................................................................................. 45
2.5 Digital Display Interfaces (DDI)....................................................................... 47
2.5.1 DDI Signal Definitions ............................................................................................... 47
2.5.2 Digital Display Interfaces (DDI) Routing Guidelines .................................................. 55
2.5.2.1 DisplayPort Routing Guidelines ..................................................................... 55
2.5.2.2 HDMI / DVI Routing Guidelines ...................................................................... 57
2.5.3 HDMI / DVI Level Shifter Requirements .................................................................... 59
2.5.4 ESD Protection ......................................................................................................... 59
2.6 LAN Interface .................................................................................................. 60
2.6.1 LAN Signal Definitions .............................................................................................. 60
2.6.2 LAN Routing Guidelines ............................................................................................ 62
2
2.6.3 LAN Trace Length Guidelines ................................................................................... 63
2.6.4 Reference Ground Isolation and Coupling ................................................................ 64
2.7 USB2.0 Ports .................................................................................................. 65
2.7.1 USB2.0 Signal Definitions ......................................................................................... 65
2.7.1.1 USB Over-Current Protection (USB_x_y_OC#) .............................................. 68
2.7.1.2 Powering USB devices during S5 .................................................................. 68
2.7.2 USB2.0 Routing Guidelines ...................................................................................... 69
2.7.2.1 USB 2.0 General Design Considerations and Optimization ............................ 70
2.7.2.2 USB 2.0 Port Power Delivery ......................................................................... 70
2.7.2.3 USB 2.0 Common Mode Chokes ................................................................... 71
2.7.2.4 EMI / ESD Protection ..................................................................................... 72
2.7.3 USB2.0 Trace Length Guidelines .............................................................................. 73
2.8 USB3.0 ........................................................................................................... 74
2.8.1 USB3.0 Signal Definitions ......................................................................................... 74
2.8.1.1 USB Over-Current Protection (USB_x_y_OC#) .............................................. 77
2.8.1.2 EMI / ESD Protection ..................................................................................... 77
2.8.2 USB3.0 Routing Guidelines ...................................................................................... 78
2.8.2.1 USB3.0 Differential Transitional Via Recommendations ................................. 78
2.8.3 USB3.0 Trace Length Guidelines .............................................................................. 79
2.9 SATA .............................................................................................................. 80
2.9.1 SATA Signal Definitions ............................................................................................ 80
2.9.2 SATA Routing Guidelines ......................................................................................... 82
2.9.2.1 General SATA Routing Guidelines ................................................................. 83
2.9.2.2 SATA Differential Transitional Via Recommendations.................................... 83
2.9.3 SATA Trace Length Guidelines ................................................................................. 84
2.10 LVDS ............................................................................................................ 85
2.10.1. Signal Definitions ...................................................................................................... 85
2.10.1.1 Display Timing Configuration ....................................................................... 88
2.10.1.2 Backlight Control .......................................................................................... 88
2.10.2 LVDS Routing Guidelines ....................................................................................... 89
2.10.3 LVDS Trace Length Guidelines ............................................................................... 90
2.11 Embedded DisplayPort (eDP) * Optionally support eDP .............................. 91
2.11.1 eDP Signal Definitions ............................................................................................ 91
2.11.2 eDP Trace Length Guidelines ................................................................................. 93
2.12 VGA .............................................................................................................. 94
2.12.1 VGA Signal Definitions ............................................................................................ 94
2.12.2 VGA Routing Guidelines ......................................................................................... 96
2.12.2.1 RGB Analog Signals .................................................................................... 96
3
2.12.2.2 HSYNC and VSYNC Signals ....................................................................... 96
2.12.2.3 DDC Interface .............................................................................................. 96
2.12.2.4 ESD Protection/EMI ..................................................................................... 96
2.12.3 VGA Trace Length Guidelines ................................................................................. 97
2.13 Digital Audio Interfaces ................................................................................. 98
2.13.1 Audio Codec Signal Descriptions ............................................................................ 98
2.13.2 Audio Routing Guidelines ........................................................................................ 100
2.13.3 Audio Trace Length Guidelines ............................................................................... 101
2.14 LPC Bus – Low Pin Count Interface ............................................................. 102
2.14.1 LPC Signal Definition .............................................................................................. 102
2.14.2 LPC Routing Guidelines .......................................................................................... 103
2.14.2.1 General Signals ........................................................................................... 103
2.14.2.2 Bus Clock Routing ....................................................................................... 104
2.14.3 LPC Trace Length Guidelines ................................................................................. 104
2.15 SPI – Serial Peripheral Interface Bus ........................................................... 105
2.15.1 SPI Signal Definition ............................................................................................... 105
2.15.2 SPI Routing Guidelines ........................................................................................... 107
2.15.3 SPI Trace Length Guidelines .................................................................................. 107
2.16 General Purpose I2C Bus Interface .............................................................. 108
2.16.1 Signal Definitions .................................................................................................... 108
2.16.2 I2C Routing Guidelines ........................................................................................... 109
2.16.3 I2C Trace Length Guidelines .................................................................................. 110
2.16.4 Connectivity Considerations .................................................................................... 110
2.17 System Management Bus (SMBus) ............................................................. 111
2.17.1 SMB Signal Definitions............................................................................................ 112
2.17.2 SMB Routing Guidelines ......................................................................................... 113
2.17.3 SMB Trace Length Guidelines ................................................................................ 113
2.18 General Purpose Serial Interface ................................................................. 114
2.18.1 Serial interface Signal Definitions ............................................................................ 114
2.18.2 Serial interface Routing Guidelines ......................................................................... 115
2.18.3 Serial interface Trace Length Guidelines ................................................................ 115
2.19 CAN Interface * Optionally support CAN ................................................... 116
2.19.1 CAN interface Signal Definitions ............................................................................. 116
2.19.2 CAN interface Routing Guidelines ........................................................................... 116
2.19.3 CAN interface Trace Length Guidelines .................................................................. 117
2.20 Miscellaneous Signals .................................................................................. 118
2.20.1 Miscellaneous Signals ............................................................................................ 118
4
2.20.1.1 Logic Level Signals on Pins Reclaimed from VCC_12 ................................. 122
2.20.2 Power Management Signals ................................................................................... 123
2.20.3 Thermal Interface .................................................................................................... 125
2.20.4 Miscellaneous Signals Routing Guidelines .............................................................. 125
2.20.5 SDIO Signals Trace Length Guidelines ................................................................... 126
3 Power ................................................................................................................. 127
3.1 General Power requirements .......................................................................... 127
3.2 VCC5_SBY Routing ........................................................................................ 127
3.3 ATX and AT Power Sequencing Diagrams .................................................... 127
3.4 Input Power - Rise Time ................................................................................. 130
3.5 Design Considerations for Carrier Boards containing FPGAs/CPLDs ........... 131
4 Electrical Characteristics ................................................................................... 132
4.1 Absolute Maximum Ratings ............................................................................ 132
4.2 DC Characteristics .......................................................................................... 132
4.3 Inrush Current ................................................................................................. 132
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