CHIN. PHYS. LETT. Vol. 32, No. 10 (2015) 108502
Statistical Modeling of Gate Capacitance Variations Induced by Random Dopants
in Nanometer MOSFETs Reserving Correlations
*
LÜ Wei-Feng(吕伟锋)
**
, WANG Guang-Yi(王光义), LIN Mi(林弥), SUN Ling-Ling(孙玲玲)
College of Electronics and Information, Hangzhou Dianzi University, Hangzhou 310018
(Received 14 May 2015)
We consider intrinsic gate capacitance variations due to random dopants in the nanometer metal oxide semi-
conductor field effect transistor (MOSFET) channel. The variations of total gate capacitance and gate trans-
capacitances are investigated and the strong correlations between the trans-capacitance variations are discovered.
A simple statistical model is proposed for accurately capturing total gate capacitance variability based on the
correlations. The model fits very well with the Monte Carlo simulations and the average errors are −0.033% for
n-type metal-oxide semiconductor and −0.012% for p-type metal-oxide semiconductor, respectively. Our simula-
tion studies also indicate that, owing to these correlations, the total gate capacitance variability will not dominate
in gate capacitance variations.
PACS: 85.30.De, 84.32.Tt, 85.40.Bh, 85.40.Ry DOI: 10.1088/0256-307X/32/10/108502
The continued shrinking of nanometer metal-
oxide-semiconductor field effect transistor (MOSFET)
dimensions has led to a great improvement in analog
and rf performance in recent years.
[1]
The improve-
ments of these characteristics mainly rely on reduc-
tions of intrinsic gate capacitances in a MOSFET.
[2,3]
These intrinsic gate capacitances can be classified
into total gate capacitance (𝐶
gg
) and gate trans-
capacitances, and the gate trans-capacitances include
gate-to-source (𝐶
gs
), gate-to-bulk (𝐶
gb
), and gate-
to-drain (𝐶
gd
) capacitances. Based on the Meyer
model, 𝐶
gg
is the sum of 𝐶
gs
, 𝐶
gd
, and 𝐶
gb
, i.e.,
𝐶
gg
= 𝐶
gs
+ 𝐶
gd
+ 𝐶
gb
. On the other hand, these
ultra-small gate capacitances are susceptible to the
imperfect manufacture process, and any variations of
a gate trans-capacitance will affect 𝐶
gg
and the de-
vice characteristics.
[2,4]
Therefore, analysis and mod-
eling of variations in these gate capacitances become
an urgent task for predicting MOSFETs’ behavior in
the early design stage.
[5,6]
It has been reported that
𝐶
gg
will vary drastically due to random dopant fluctu-
ation (RDF)
[7,8]
in the MOSFET channel, which is re-
garded as one of the most important variation sources
in current planar nanometer complementary metal-
oxide-semiconductor (CMOS) technology. However,
it has not been understood yet how these trans-
capacitances interact with each other and how these
trans-capacitance variations induced by RDF impact
𝐶
gg
variability. Therefore, this study will address the
deficiencies.
The MOSFETs investigated are with state of the
art 22 nm technology. The effective channel dimen-
sions (𝐿
eff
× 𝑊
eff
) are 22 nm × 22 nm for both n-type
metal-oxide semiconductor (MOS) and p-type MOS
devices. The nominal channel doping concentrations
(𝑁
av
) are 5.5 × 10
18
cm
−3
for the n-type MOS and
4.4 × 10
18
cm
−3
for the p-type MOS based on the
predictive technology model (PTM) for low-power
applications.
[9]
However, the modeling approach is
also suitable for different channel dimensions and dop-
ing concentrations as we can see in the following. In
the present study, only the RDF effects are included
and the standard deviations (SDs) of doping atoms
in MOSFET channels are according to the Poisson
statistical distribution.
[8,10−12]
Monte Carlo simula-
tions are performed to investigate the gate capacitance
variations. Figure 1 depicts these variations on gate
voltage dependence. It can be observed that all the
gate capacitances vary due to the random dopants in
the MOSFET channel and the 𝐶
gg
variability is not
always greater than the trans-capacitance variations.
Therefore, we cannot describe the gate capacitance
variations only by studying the 𝐶
gg
variability, while
we should investigate all these trans-capacitance vari-
ations together with 𝐶
gg
variability by establishing a
connection between them. Figure 2 demonstrates all
the maxima of the gate, capacitance variations are
near the threshold voltages (𝑉
T
= 555 mV). We can
see generally the absolute SD of the 𝐶
gg
variability is
greater than 𝐶
gd
and 𝐶
gb
variations, while it is smaller
than 𝐶
gs
variation. Figure 3 gives the normalized gate
capacitance SDs (relative SDs) on gate voltage depen-
dence. It is interesting that the relative SD 𝜎(𝐶
gg
)
is basically smaller than these gate trans-capacitance
variations.
The maximum of the 𝐶
gg
variability is about 8.2%
while the maxima of the 𝐶
gs
, 𝐶
gd
and 𝐶
gb
variations
are 29.5%, 38.7%, and 10.4%, respectively. Therefore,
we cannot model theses gate capacitance variations
based on the well-known back propagation of variation
(BPV) methodology ignoring correlation, which has
been widely used for process variations modeling.
[4,11]
This analytical equation for modeling is
𝜎
2
(𝐶
gg
) = 𝜎
2
(𝐶
gs
) + 𝜎
2
(𝐶
gd
) + 𝜎
2
(𝐶
gb
),
or
𝜎
2
(𝐶
gg
)
𝐶
gg
=
𝜎
2
(𝐶
gs
)
𝐶
gs
+
𝜎
2
(𝐶
gd
)
𝐶
gd
+
𝜎
2
(𝐶
gb
)
𝐶
gb
. (1)
*
Supported by the National Natural Science Foundation of China under Grant Nos 61271064, 61571171 and 61302009, and the
Zhejiang Provincial Natural Science Foundation of China under Grant No LZ12F01001.
**
Corresponding author. Email: lvwf@hdu.edu.cn
© 2015 Chinese Physical Society and IOP Publishing Ltd
108502-1
