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标题：“PCA9548文档”说明了文档的主要内容是围绕PCA9548这一特定型号的I2C扩展芯片进行的开发和设计指南。PCA9548是一个多通道I2C开关，广泛用于多种I2C总线设备的扩展。描述：“该文档主要是供开发者做I2C扩展芯片pca9548的开发设计”，这表明文档的目的是为了向开发者提供必要的信息，使他们能够理解PCA9548的功能，并利用这些功能进行硬件设计和编程。文档可能包含PCA9548的技术规格、应用案例、电路设计指导和编程示例。标签：“pca9548,i2c”，这两个标签明确指出了文档所涉及的核心内容。PCA9548是一款I2C总线扩展芯片，因此了解I2C通信协议对于理解PCA9548的工作原理至关重要。在提供的部分内容中，我们可以提炼以下知识点： 1. PCA9548是一种具有8个双向通道的I2C开关，能够实现不同电压级别的设备之间的电平转换。 2. 每个通道都通过I2C总线进行控制，该芯片支持多个PCA9548芯片通过硬件地址引脚在同一个I2C总线上工作。 3. PCA9548具有一个低有效的复位输入，允许系统主控器在检测到超时或其他不正常操作时重置PCA9548，这有助于解决I2C总线上的通信错误。 4. 在电源开启时，所有的通道默认都是未选通的，从而确保了设备的稳定启动。 5. PCA9548的工作电压范围为2.3V到5.5V，且输入引脚对5V信号具有耐受性，这增加了其适用性。 6. 设备具备热插拔能力，无上电时的脉冲，以及低待机电流消耗。 7. 设备还具备ESD保护，超过了人体模型2000V、机器模型200V和带电设备模型1000V的保护标准。 8. PCA9548的典型应用包括服务器、路由器（电信交换设备）、工厂自动化以及有I2C从设备地址冲突的产品，比如多个相同的温度传感器。 9. PCA9548的工作频率最高可达400kHz，它还有内部上电复位电路，能够初始化I2C/SMBus状态机。 10. 设备信息方面，PCA9548提供TSSOP和VQFN两种封装形式，并且文档末尾通常会有关于产品可用性、保修、变更、使用安全关键应用的信息、知识产权事宜以及其他重要免责声明的声明。在设计和使用PCA9548时，开发者需要考虑这些知识点，确保他们的设计可以充分利用PCA9548的功能，同时避免可能的问题。此外，了解I2C通信协议和PCA9548的电气特性对于实现可靠的I2C总线扩展至关重要。开发者还需要参考完整的PCA9548数据手册，获取关于引脚配置、典型应用电路设计、电气特性、详细性能参数和封装信息的详细说明。

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PCA9548A

Slaves A0, A1...AN

Slaves B0, B1...BN

Slaves H0, H1...HN

I2C or SMBus

Master

(processor)

SDA

SCL

SD0

SC0

Channel 0

Channel 1

Channel 7

RESET

SD1

SC1

SD7

SC7

VCC

GND

Slaves C0, C1...CN

Channel 2

SD2

SC2

Product

Folder

Sample &

Buy

Technical

Documents

Tools &

Software

Support &

Community

PCA9548A

SCPS143E –JUNE 2009–REVISED FEBRUARY 2015

PCA9548A Low Voltage 8-Channel I

C Switch With Reset

1 Features 2 Applications

• 1-of-8 Bidirectional Translating Switches

• Servers

• I

C Bus and SMBus Compatible • Routers (Telecom Switching Equipment)

• Active-Low Reset Input • Factory Automation

• Three Hardware Address Pins for Use of up to • Products With I

C Slave Address Conflicts (e.g.

Eight PCA9548A Devices on the I

C Bus Multiple, Identical Temp Sensors)

• Channel Selection Via I

C Bus

3 Description

• Power-Up with All Switch Channels Deselected

The PCA9548A has eight bidirectional translating

• Low R

Switches

switches that can be controlled via the I

C bus. The

• Allows Voltage-Level Translation Between 1.8-V,

SCL/SDA upstream pair fans out to eight downstream

2.5-V, 3.3-V, and 5-V Buses

pairs, or channels. Any individual SCx/SDx channel

or combination of channels can be selected,

• No Glitch on Power Up

determined by the contents of the programmable

• Supports Hot Insertion

control register.

• Low Standby Current

The system master can reset the PCA9548A in the

• Operating Power-Supply Voltage Range of 2.3

event of a timeout or other improper operation by

V to 5.5 V

asserting a low in the RESET input. Similarly, the

• 5-V Tolerant Inputs

power-on reset deselects all channels and initializes

the I

C/SMBus state machine. Asserting RESET

• 0 to 400-kHz Clock Frequency

causes the same reset/initialization to occur without

• Latch-Up Performance Exceeds 100 mA Per

powering down the part.

JESD 78, Class II

• ESD Protection Exceeds JESD 22

Device Information

(1)

– 2000-V Human-Body Model (A114-A)

DEVICE NAME PACKAGE BODY SIZE (NOM)

TSSOP (24) 7.80 mm × 4.40 mm

– 200-V Machine Model (A115-A)

PCA9548A

VQFN (24) 4.00 mm × 4.00 mm

– 1000-V Charged-Device Model (C101)

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

Simplified Schematic

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

PCA9548A

SCPS143E –JUNE 2009–REVISED FEBRUARY 2015

www.ti.com

Table of Contents

9.2 Functional Block Diagram ....................................... 10

1 Features.................................................................. 1

9.3 Feature Description................................................. 11

2 Applications ........................................................... 1

9.4 Device Functional Modes........................................ 11

3 Description ............................................................. 1

9.5 Programming........................................................... 11

4 Revision History..................................................... 2

9.6 Register Map........................................................... 13

5 Description (continued)......................................... 3

10 Application and Implementation........................ 16

6 Pin Configuration and Functions......................... 3

10.1 Application Information.......................................... 16

7 Specifications......................................................... 4

10.2 Typical Application ................................................ 16

7.1 Absolute Maximum Ratings ..................................... 4

11 Power Supply Recommendations ..................... 20

7.2 ESD Ratings.............................................................. 4

11.1 Power-On Reset Errata......................................... 20

7.3 Recommended Operating Conditions ...................... 4

12 Layout................................................................... 20

7.4 Thermal Information.................................................. 4

12.1 Layout Guidelines ................................................. 20

7.5 Electrical Characteristics........................................... 5

12.2 Layout Example .................................................... 21

7.6 I

C Interface Timing Requirements........................... 6

13 Device and Documentation Support ................. 22

7.7 Switching Characteristics.......................................... 6

13.1 Trademarks........................................................... 22

7.8 Reset Timing Requirements ..................................... 6

13.2 Electrostatic Discharge Caution............................ 22

8 Parameter Measurement Information .................. 7

13.3 Glossary................................................................ 22

9 Detailed Description .............................................. 9

14 Mechanical, Packaging, and Orderable

9.1 Overview ................................................................... 9

Information ........................................................... 22

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision D (June 2014) to Revision E Page

• Changed front page image..................................................................................................................................................... 1

• Added Thermal Information. ................................................................................................................................................... 4

• Added Layout Example. ....................................................................................................................................................... 21

Changes from Revision C (June 2007) to Revision D Page

• Added RESET Errata section............................................................................................................................................... 11

• Updated Typical Application schematic. .............................................................................................................................. 17

• Added Power-On Reset Errata section. .............................................................................................................................. 20

Product Folder Links: PCA9548A

DB,DGV,DW,ORPWPACKAGE

(TOP VIEW)

A1 SDA

RESET

SCL

SD0 A2

SC0 SC7

SD1 SD7

SC1 SC6

SD2 SD6

SC2 SC5

SD3 SD5

SC3 SC4

GND SD4

241

214

196

169

1510

1411

RGEPACKAGE

(TOP VIEW)

24 23 22 21 20

7 8 9 10 11

RESET

SD4

SC4

SDA

SD3

SC3

GND

SCL

SD5

SD0

SC0

SD1

SC1

SD2

SC2

SC7

SD7

SC6

SD6

SC5

PCA9548A

www.ti.com

SCPS143E –JUNE 2009–REVISED FEBRUARY 2015

5 Description (continued)

The pass gates of the switches are constructed so that the V

pin can be used to limit the maximum high

voltage, which is passed by the PCA9548A. This allows the use of different bus voltages on each pair, so that

1.8-V or 2.5-V or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up

resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant.

6 Pin Configuration and Functions

Pin Functions

NO.

DESCRIPTION

NAME

DW, DB, TPW, AND

QFN (RGE)

DGV

A0 1 22 Address input 0. Connect directly to V

or ground.

A1 2 23 Address input 1. Connect directly to V

or ground.

RESET 3 24 Active-low reset input. Connect to V

through a pull-up resistor, if not used.

SD0 4 1 Serial data 0. Connect to V

through a pull-up resistor.

SC0 5 2 Serial clock 0. Connect to V

through a pull-up resistor.

SD1 6 3 Serial data 1. Connect to V

through a pull-up resistor.

SC1 7 4 Serial clock 1. Connect to V

through a pull-up resistor.

SC2 8 5 Serial data 2. Connect to V

through a pull-up resistor.

SC2 9 6 Serial clock 2. Connect to V

through a pull-up resistor.

SD3 10 7 Serial data 3. Connect to V

through a pull-up resistor.

SC3 11 8 Serial clock 3. Connect to V

through a pull-up resistor.

GND 12 9 Ground

SD4 13 10 Serial data 4. Connect to V

through a pull-up resistor.

SC4 14 11 Serial clock 4. Connect to V

through a pull-up resistor.

SD5 15 12 Serial data 5. Connect to V

through a pull-up resistor.

SC5 16 13 Serial clock 5. Connect to V

through a pull-up resistor.

SD6 17 14 Serial data 6. Connect to V

through a pull-up resistor.

SC6 18 15 Serial clock 6. Connect to V

through a pull-up resistor.

SD7 19 16 Serial data 7. Connect to V

through a pull-up resistor.

SC7 20 17 Serial clock 7. Connect to V

through a pull-up resistor.

A2 21 18 Address input 2. Connect directly to V

or ground.

SCL 22 19 Serial clock bus. Connect to V

through a pull-up resistor.

SDA 23 20 Serial data bus. Connect to V

through a pull-up resistor.

24 21 Supply voltage

Product Folder Links: PCA9548A

PCA9548A

SCPS143E –JUNE 2009–REVISED FEBRUARY 2015

www.ti.com

7 Specifications

7.1 Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

Supply voltage –0.5 7 V

Input voltage

(2)

–0.5 7 V

Input current ±20 mA

Output current ±25 mA

Supply current ±100 mA

stg

Storage temperature range –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

7.2 ESD Ratings

VALUE UNIT

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001

(1)

±2000

(ESD)

Electrostatic discharge V

Charged-device model (CDM), per JEDEC specification JESD22- ±1000

C101

(2)

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

(1)

MIN MAX UNIT

Supply voltage 2.3 5.5 V

SCL, SDA 0.7 × V

High-level input voltage V

A2–A0, RESET 0.7 × V

+ 0.5

SCL, SDA –0.5 0.3 × V

Low-level input voltage V

A2–A0, RESET –0.5 0.3 × V

Operating free-air temperature –40 85 °C

(1) All unused control inputs of the device must be held at V

or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

7.4 Thermal Information

PCA9548A

THERMAL METRIC

(1)

DB DGV DW PW RGE UNIT

24 PINS

θJA

Junction-to-ambient thermal resistance 89.1 99.6 73.2 100.6 49.5

θJC(to

Junction-to-case (top) thermal resistance 51.1 31.1 41.3 46.2 53.2

θJB

Junction-to-board thermal resistance 46.6 53.1 42.9 54.5 26.4

°C/W

Junction-to-top characterization parameter 18.5 0.9 15.3 6.8 1.7

Junction-to-board characterization parameter 46.3 52.6 42.6 54.0 26.4

θJC(b

Junction-to-case (bottom) thermal resistance N/A N/A N/A N/A 8.5

ot)

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

Product Folder Links: PCA9548A

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