AXI Interconnect Product Guide v2.1 4
PG059 December 20, 2017 www.xilinx.com Product Specification
Introduction
The Xilinx® LogiCORE™ IP AXI Interconnect
core connects one or more AXI
memory-mapped master devices to one or
more memory-mapped slave devices.
Note:
The AXI Interconnect core is intended for
memory-mapped transfers only. For AXI4-Stream
transfers, see the AXI4-Stream Infrastructure IP Suite
LogiCORE IP Product Guide (PG085) [Ref 1].
Features
The AXI Interconnect core is comprised of
multiple LogiCORE IP instances (infrastructure
cores). Each of the AXI4 memory-mapped
infrastructure cores that comprise the AXI
Interconnect core are fully described in this
document. The following features apply to the
AXI Interconnect core in general and to all
infrastructure cores described in this document
unless otherwise noted:
• AXI protocol compliant. Can be configured
to support AXI3, AXI4, and AXI4-Lite
protocols
• Interface data widths:
°
AXI4 and AXI3: 32, 64, 128, 256, 512, or
1,024 bits
°
AXI4-Lite: 32 or 64 bits
• Address width: Up to 64 bits
• USER width (per channel): Up to 1,024 bits
• ID width: Up to 32 bits
• Support for Read-only and Write-only
masters and slaves, resulting in reduced
resource utilization
IP Facts
LogiCORE IP Facts Table
Core Specifics
Supported
Device
Family
(1)
UltraScale+™,
UltraScale™,
7 Series FPGAs
Zynq®-7000
Supported
User Interfaces
AXI4, AXI4-Lite, AXI3
Resources See Tab le 2-16 through Tab le 2-2 6.
Provided with Core
Design Files Verilog and VHDL
Example
Design
Not Provided
Test Bench Not Provided
Constraints
File
Xilinx Design Constraints (XDC)
Simulation
Model
Not Provided
Supported
S/W Driver
N/A
Tested Design Flows
(2)
Design Entry Vivado® Design Suite
Simulation
For supported simulators, see the
Xilinx Design Tools: Release Notes Guide.
Synthesis Vivado Synthesis
Support
Provided by Xilinx at the Xilinx Support web page
Notes:
1. For a complete list of supported devices, see the Vivado IP
catalog.
2. For the supported versions of the tools, see the
Xilinx Design Tools: Release Notes Guide.
