ATB110x Datasheet Ver: 1.3
Copyright
®
2018~2019 Actions (Zhuhai) Technology Co., Ltd. All rights reserved.
Page 5 of 268
4.3.13 SPICACHE_TOTAL_MISS_COUNT .............................................................................................................. 32
4.3.14 SPICACHE_TOTAL_HIT_COUNT................................................................................................................. 32
5 MEMORY CONTROLLER .....................................................................................................................................33
5.1 MEMORY MAP ..................................................................................................................................................... 33
5.2 MEMORY CONTROL REGISTER LIST ............................................................................................................................ 34
5.3 REGISTER DESCRIPTION .......................................................................................................................................... 35
5.3.1 MEMCTRL ..................................................................................................................................................... 35
5.3.2 VECTORBASEADDR ....................................................................................................................................... 35
5.3.3 MAPPING_ADDR0 ........................................................................................................................................ 35
5.3.4 ADDR0_ENTRY ............................................................................................................................................. 35
5.3.5 MAPPING_ADDR1 ........................................................................................................................................ 36
5.3.6 ADDR1_ENTRY ............................................................................................................................................. 36
5.3.7 MAPPING_ADDR2 ........................................................................................................................................ 36
5.3.8 ADDR2_ENTRY ............................................................................................................................................. 36
5.3.9 MAPPING_ADDR3 ........................................................................................................................................ 37
5.3.10 ADDR3_ENTRY ......................................................................................................................................... 37
5.3.11 MAPPING_ADDR4 .................................................................................................................................... 37
5.3.12 ADDRz4_ENTRY ........................................................................................................................................ 37
5.3.13 MAPPING_ADDR5 .................................................................................................................................... 37
5.3.14 ADDR5_ENTRY ......................................................................................................................................... 38
5.3.15 MAPPING_ADDR6 .................................................................................................................................... 38
5.3.16 ADDR6_ENTRY ......................................................................................................................................... 38
5.3.17 MAPPING_ADDR7 .................................................................................................................................... 38
5.3.18 ADDR7_ENTRY ......................................................................................................................................... 39
5.3.19 ADDR_MISS_STA ...................................................................................................................................... 39
6 BLE(BLUETOOTH LOW ENERGY) ....................................................................................................................40
6.1 OVERVIEW ........................................................................................................................................................... 40
6.2 BLE PERFORMANCE .............................................................................................................................................. 40
6.3 BLE REGISTER LIST ................................................................................................................................................ 42
6.4 REGISTER DESCRIPTION .......................................................................................................................................... 42
6.4.1 BLE_CTL ........................................................................................................................................................ 42
6.4.2 BLE_STATE .................................................................................................................................................... 43
6.4.3 BLE_INT_CTL ................................................................................................................................................ 44
7 SYSTEM CONTROL ..............................................................................................................................................45
7.1 PMU ................................................................................................................................................................. 45
7.1.1 Overview ...................................................................................................................................................... 45
7.1.2 Power architecture ....................................................................................................................................... 46
7.1.2.1 VDD Linear Regulators ........................................................................................................................................47
7.1.2.2 BLE Power ............................................................................................................................................................48
7.1.2.3 BLEAVDD Generating Subsystem .......................................................................................................................48
7.1.3 A/D Converters ............................................................................................................................................. 48
7.1.3.1 Mode .....................................................................................................................................................................48