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EDK Concepts, Tools, and

Techniques

A Hands-On Guide to Effective

Embedded System Design

XTP013 EDK 10.1

2 www.xilinx.com EDK Concepts, Tools & Techniques

XTP013 EDK 10.1

Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of

designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the

Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without

the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right,

at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the

Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or

assistance that may be provided to you in connection with the Information.

THE DOCUMENTATION IS DISCLOSED TO YOU “AS-IS” WITH NO WARRANTY OF ANY KIND. XILINX MAKES NO OTHER WARRANTIES,

WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANY WARRANTIES OF

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XILINX BE LIABLE FOR ANY CONSEQUENTIAL, INDIRECT, EXEMPLARY, SPECIAL, OR INCIDENTAL DAMAGES, INCLUDING ANY LOSS

OF DATA OR LOST PROFITS, ARISING FROM YOUR USE OF THE DOCUMENTATION.

XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are

the property of their respective owners.

Revision History

The following table shows the revision history for this document.

Date Version Revision

01/01/07 9.1i Book release for EDK 9.1i.

09/05/07 9.2i Book release for EDK 9.2i.

11/05/07 10.1 Book release for ISE Unified 10.1 release.

9/18/08 10.1 Book release for ISE v10.1 SP3 release.

EDK Concepts, Tools & Techniques www.xilinx.com 3

XTP013 EDK 10.1

Preface: About This Guide

Additional Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Typographical. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Online Document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Chapter 1: Introduction

Welcome . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Additional Documentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

How EDK Simplifies Embedded Processor Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Integrated Software Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Embedded Development Kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

How Do the Tools Expedite the Design Process? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Before Starting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Chapter 2: Creating a New Project

The Base System Builder (BSB). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Why Should I Use BSB?. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

What You Can Do in the BSB Wizard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Note on BSB and Custom Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

What’s Next? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Chapter 3: Xilinx Platform Studio

What is XPS? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

The XPS GUI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Project Information Area. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

System Assembly View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Console Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

XPS Tools. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

XPS Directory Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Directories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

What’s Next? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Chapter 4: The Embedded Hardware Platform

What’s in a Hardware Platform? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Hardware Platform Development in Xilinx Platform Studio. . . . . . . . . . . . . . . . . . 33

The MHS File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

The Hardware Platform in System Assembly View . . . . . . . . . . . . . . . . . . . . . . . . . . 34

What’s Next? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table of Contents

4 www.xilinx.com EDK Concepts, Tools & Techniques

XTP013 EDK 10.1

Chapter 5: Creating Your Own Intellectual Property (IP)

IP Creation Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

How to Do It: Use the CIP Wizard! . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

The Create and Import Peripheral Wizard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

What You Need to Know Before Running the CIP Wizard. . . . . . . . . . . . . . . . . . . . . . 38

What Just Happened? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

What’s Next? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Chapter 6: The Software Platform and SDK

Board Support Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

MSS File and Other Software Platform Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Platform Studio Software Development Kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Adding Test Software for Your Custom IP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Returning to XPS to Complete Your Project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

What’s Next? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Chapter 7: Introduction to Simulation in XPS

Before You Begin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Why Simulate an Embedded Design?. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

EDK Simulation Basics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Simulation Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Global Settings to Specify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

System Behavior and Improving Simulation Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Helper Scripts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Simulation Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Running Simulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Chapter 8: Implementing and Downloading Your Design

Implementing the Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Netlist Generation Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Chapter 9: Debugging the Design

Xilinx MicroProcessor Debugger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

SDK Software Debugger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

ChipScope Pro Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Platform Debug . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Hardware and Software Co-Debug. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Appendix A: More About BFM Simulation

Appendix B: Glossary

5 www.xilinx.com EDK Concepts, Tools & Techniques

XTP013 EDK 10.1

Chapter 1: Introduction

Figure 1-1: Basic Embedded Design Process Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Chapter 2: Creating a New Project

Chapter 3: Xilinx Platform Studio

Figure 3-1: Xilinx Platform Studio User Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 3-2: Project Information Area, Project Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 3-3: Project Information Area, Applications Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 3-4: Project Information Area, IP Catalog Tab. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 3-5: System Assembly View Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 3-6: XPS Startup Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 3-7: BSB Wizard-Created Directories and Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Chapter 4: The Embedded Hardware Platform

Figure 4-1: MHS File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Chapter 5: Creating Your Own Intellectual Property (IP)

Figure 5-1: PLB Slave/Burst Module in a Custom Peripheral . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 5-2: Directory Structure Generated by the CIP Wizard . . . . . . . . . . . . . . . . . . . . . . 42

Figure 5-3: Relationship of IP Module to Generated Files. . . . . . . . . . . . . . . . . . . . . . . . . . 42

Figure 5-4: User_logic.vhd Template File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Figure 5-5: XPS BFM User PCORE Simulation Project. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 5-6: BFM Waveform Simulation Results for sample.bfl @ t=640 ns . . . . . . . . . . . 45

Figure 5-7: Relaunching XPS from the ISE Project Navigator. . . . . . . . . . . . . . . . . . . . . . . 46

Chapter 6: The Software Platform and SDK

Figure 6-1: Elements and Stages of ELF File Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Figure 6-2: Platform Studio SDK Project Creation Wizard . . . . . . . . . . . . . . . . . . . . . . . . . 51

Figure 6-3: Importing test_ip Software Files. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Figure 6-4: Sample Software Template Created by the CIP Wizard . . . . . . . . . . . . . . . . . 52

Figure 6-5: File Search Dialog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Figure 6-6: Code Insertion for TestApp_Peripheral.c File . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Figure 6-7: XPS ELF File Management Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Figure 6-8: Project Setting for BRAM Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Chapter 7: Introduction to Simulation in XPS

Figure 7-1: FPGA Design Simulation Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Schedule of Figures

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