1
FEATURES
A0
P17
P16
P15
P14
P13
24 22 21
20 19
SDA
A2
A1
SCL
23
7 9 10 11 128
P00
P01
P02
P03
P04
P05
1
2
3
4
5
6
18
17
16
15
14
13
P10
P11
P06
P07
P12
GND
V
CC
INT
Exposed
Center
Pad
INT
A1
A2
P00
P01
P02
P03
P04
P05
P06
P07
GND
V
CC
SDA
SCL
A0
P17
P16
P15
P14
P13
P12
P11
P10
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
DESCRIPTION/ORDERING INFORMATION
TCA9555
www.ti.com
.............................................................................................................................................................. SCPS200A – JULY 2009 – REVISED JULY 2009
LOW VOLTAGE 16-BIT I
2
C AND SMBus I/O EXPANDER
WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
• Low Standby-Current Consumption of • Polarity Inversion Register
3 µ A Max
• Latched Outputs With High-Current Drive
• I
2
C to Parallel Port Expander Capability for Directly Driving LEDs
• Open-Drain Active-Low Interrupt Output • Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• 5-V Tolerant I/O Ports
• ESD Protection Exceeds JESD 22
• Compatible With Most Microcontrollers
– 2000-V Human-Body Model (A114-A)
• 400-kHz Fast I
2
C Bus
– 200-V Machine Model (A115-A)
• Address by Three Hardware Address Pins for
Use of up to Eight Devices – 1000-V Charged-Device Model (C101)
PW PACKAGE RTW PACKAGE
(TOP VIEW) (TOP VIEW)
The exposed center pad, if used, must be
connected as a secondary ground or left
electrically open.
This 16-bit I/O expander for the two-line bidirectional bus (I
2
C) is designed for 1.65-V to 5.5-V V
CC
operation. It
provides general-purpose remote I/O expansion for most microcontroller families via the I
2
C interface [serial clock
(SCL), serial data (SDA)].
The TCA9555 consists of two 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity
Inversion (active high or active low operation) registers. At power on, the I/Os are configured as inputs. The
system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for
each input or output is kept in the corresponding Input or Output register. The polarity of the Input Port register
can be inverted with the Polarity Inversion register. All registers can be read by the system master.
The system master can reset the TCA9555 in the event of a timeout or other improper operation by utilizing the
power-on reset feature, which puts the registers in their default state and initializes the I
2
C/SMBus state machine.
The TCA9555 open-drain interrupt ( INT) output is activated when any input state differs from its corresponding
Input Port register state and is used to indicate to the system master that an input state has changed.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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