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ARM7TDMI-S based high-performance 32-bit RISC Microcontroller with Thumb extensions 32KB on-chip Flash ROM with In-System Programming (ISP) and In-Application Programming (IAP), 8KB RAM, Vectored Interrupt Controller, One 10bit ADCs with 8 channels, USB 2.0 Full Speed Device Controller, Two UARTs, one with full modem interface. Two I2C serial interfaces, Two SPI serial interfaces Two 32-bit timers, Watchdog Timer, PWM unit, Real Time Clock with optional battery backup, Brown out detect circuit General purpose I/O pins. CPU clock up to 60 MHz, On-chip crystal oscillator and On-chip PLL
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1. General description
The LPC2141/42/44/46/48 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S
CPU with real-time emulation and embedded trace support, that combine microcontroller
with embedded high-speed flash memory ranging from 32 kB to 512 kB. A 128-bit wide
memory interface and a unique accelerator architecture enable 32-bit code execution at
the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb
mode reduces code by more than 30 % with minimal performance penalty.
Due to their tiny size and low power consumption, LPC2141/42/44/46/48 are ideal for
applications where miniaturization is a key requirement, such as access control and
point-of-sale. Serial communications interfaces ranging from a USB 2.0 Full-speed device,
multiple UARTs, SPI, SSP to I
2
C-bus and on-chip SRAM of 8 kB up to 40 kB, make these
devices very well suited for communication gateways and protocol converters, soft
modems, voice recognition and low end imaging, providing both large buffer size and high
processing power. Various 32-bit timers, single or dual 10-bit ADC(s), 10-bit DAC, PWM
channels and 45 fast GPIO lines with up to nine edge or level sensitive external interrupt
pins make these microcontrollers suitable for industrial control and medical systems.
2. Features
2.1 Key features
■ 16-bit/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
■ 8 kB to 40 kB of on-chip static RAM and 32 kB to 512 kB of on-chip flash memory.
128-bit wide interface/accelerator enables high-speed 60 MHz operation.
■ In-System Programming/In-Application Programming (ISP/IAP) via on-chip boot
loader software. Single flash sector or full chip erase in 400 ms and programming of
256 bytes in 1 ms.
■ EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with the
on-chip RealMonitor software and high-speed tracing of instruction execution.
■ USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM.
In addition, the LPC2146/48 provides 8 kB of on-chip RAM accessible to USB by DMA.
■ One or two (LPC2141/42 vs. LPC2144/46/48) 10-bit ADCs provide a total of 6/14
analog inputs, with conversion times as low as 2.44 µs per channel.
■ Single 10-bit DAC provides variable analog output (LPC2142/44/46/48 only).
■ Two 32-bit timers/external event counters (with four capture and four compare
channels each), PWM unit (six outputs) and watchdog.
■ Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input.
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash
with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
Rev. 01 — 3 October 2005 Preliminary data sheet
9397 750 14985 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet Rev. 01 — 3 October 2005 2 of 38
Philips Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
■ Multiple serial interfaces including two UARTs (16C550), two Fast I
2
C-bus (400 kbit/s),
SPI and SSP with buffering and variable data length capabilities.
■ Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses.
■ Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64 package.
■ Up to 21 external interrupt pins available.
■ 60 MHz maximum CPU clock available from programmable on-chip PLL with settling
time of 100 µs.
■ On-chip integrated oscillator operates with an external crystal from 1 MHz to 25 MHz.
■ Power saving modes include Idle and Power-down.
■ Individual enable/disable of peripheral functions as well as peripheral clock scaling for
additional power optimization.
■ Processor wake-up from Power-down mode via external interrupt or BOD.
■ Single power supply chip with POR and BOD circuits:
◆ CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O
pads.
3. Ordering information
3.1 Ordering options
[1] While the USB DMA is the primary user of the additional 8 kB RAM, this RAM is also accessible at any time
by the CPU as a general purpose RAM for data and code storage.
Table 1: Ordering information
Type number Package
Name Description Version
LPC2141FBD64 LQFP64 plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
SOT314-2
LPC2142FBD64
LPC2144FBD64
LPC2146FBD64
LPC2148FBD64
Table 2: Ordering options
Type number Flash
memory
RAM Endpoint
USB RAM
ADC (channels
overall)
DAC Temperature
range (°C)
LPC2141FBD64 32 kB 8 kB 2 kB 1 (6 channels) - −40 to +85
LPC2142FBD64 64 kB 16 kB 2 kB 1 (6 channels) 1 −40 to +85
LPC2144FBD64 128 kB 16 kB 2 kB 2 (14 channels) 1 −40 to +85
LPC2146FBD64 256 kB 32 kB + 8 kB
shared with
USB DMA
[1]
2 kB 2 (14 channels) 1 −40 to +85
LPC2148FBD64 512 kB 32 kB + 8 kB
shared with
USB DMA
[1]
2 kB 2 (14 channels) 1 −40 to +85
9397 750 14985 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet Rev. 01 — 3 October 2005 3 of 38
Philips Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
4. Block diagram
(1) Pins shared with GPIO.
(2) LPC2144/46/48 only.
(3) USB DMA controller with 8 kB of RAM accessible as general purpose RAM and/or DMA is available in LPC2146/48 only.
(4) LPC2142/44/46/48 only.
Fig 1. Block diagram
002aab560
system
clock
TRST
(1)
TMS
(1)
TCK
(1)
TDI
(1)
TDO
(1)
XTAL2
XTAL1
AMBA AHB
(Advanced High-performance Bus)
INTERNAL
FLASH
CONTROLLER
AHB BRIDGE
EMULATION TRACE
MODULE
TEST/DEBUG
INTERFACE
AHB
DECODER
AHB TO VPB
BRIDGE
VPB
DIVIDER
VECTORED
INTERRUPT
CONTROLLER
SYSTEM
FUNCTIONS
PLL0
USB
clock
PLL1
SYSTEM
CONTROL
32 kB/64 kB/128 kB/
256 kB/512 kB
FLASH
ARM7TDMI-S
LPC2141/42/44/46/48
INTERNAL
SRAM
CONTROLLER
8 kB/16 kB/
32 kB
SRAM
ARM7 local bus
VPB (VLSI
peripheral bus)
SCL0, SCL1
SDA0, SDA1
4 × CAP0
4 × CAP1
8 × MAT0
8 × MAT1
I
2
C-BUS SERIAL
INTERFACES 0 AND 1
CAPTURE/COMPARE
(W/EXTERNAL CLOCK)
TIMER 0/TIMER 1
EINT3 to EINT0
EXTERNAL
INTERRUPTS
D+
D−
UP_LED
CONNECT
VBUS
USB 2.0 FULL-SPEED
DEVICE CONTROLLER
WITH DMA
(3)
SCK0, SCK1
MOSI0, MOSI1
MISO0, MISO1
AD0[7:6] and
AD0[4:1]
AD1[7:0]
(2)
SSEL0, SSEL1
SPI AND SSP
SERIAL INTERFACES
A/D CONVERTERS
0 AND 1
(2)
TXD0, TXD1
RXD0, RXD1
DSR1
(2)
,CTS1
(2)
,
RTS1
(2)
, DTR1
(2)
DCD1
(2)
,RI1
(2)
AOUT
(4)
UART0/UART1
D/A CONVERTER
P0[31:28] and
P0[25:0]
P1[31:16]
RTXC2
RTXC1
VBAT
REAL-TIME CLOCK
GENERAL
PURPOSE I/O
PWM6 to PWM0
WATCHDOG
TIMER
PWM0
P0[31:28] and
P0[25:0]
P1[31:16]
FAST GENERAL
PURPOSE I/O
8 kB RAM
SHARED WITH
USB DMA
(3)
RST
9397 750 14985 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet Rev. 01 — 3 October 2005 4 of 38
Philips Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
5. Pinning information
5.1 Pinning
Fig 2. LPC2141 pinning
LPC2141
P0.21/PWM5/CAP1.3 P1.20/TRACESYNC
P0.22/CAP0.0/MAT0.0 P0.17/CAP1.2/SCK1/MAT1.2
RTXC1 P0.16/EINT0/MAT0.2/CAP0.2
P1.19/TRACEPKT3 P0.15/EINT2
RTXC2 P1.21/PIPESTAT0
V
SS
V
DD
V
DDA
V
SS
P1.18/TRACEPKT2 P0.14/EINT1/SDA1
P0.25/AD0.4 P1.22/PIPESTAT1
D+ P0.13/MAT1.1
D− P0.12/MAT1.0
P1.17/TRACEPKT1 P0.11/CAP1.1/SCL1
P0.28/AD0.1/CAP0.2/MAT0.2 P1.23/PIPESTAT2
P0.29/AD0.2/CAP0.3/MAT0.3 P0.10/CAP1.0
P0.30/AD0.3/EINT3/CAP0.0 P0.9/RXD1/PWM6/EINT3
P1.16/TRACEPKT0 P0.8/TXD1/PWM4
P0.31/UP_LED/CONNECT P1.27/TDO
V
SS
VREF
P0.0/TXD0/PWM1 XTAL1
P1.31/TRST XTAL2
P0.1/RXD0/PWM3/EINT0 P1.28/TDI
P0.2/SCL0/CAP0.0 V
SSA
V
DD
P0.23/V
BUS
P1.26/RTCK RESET
V
SS
P1.29/TCK
P0.3/SDA0/MAT0.0/EINT1 P0.20/MAT1.3/SSEL1/EINT3
P0.4/SCK0/CAP0.1/AD0.6 P0.19/MAT1.2/MOSI1/CAP1.2
P1.25/EXTIN0 P0.18/CAP1.3/MISO1/MAT1.3
P0.5/MISO0/MAT0.1/AD0.7 P1.30/TMS
P0.6/MOSI0/CAP0.2 V
DD
P0.7/SSEL0/PWM2/EINT2 V
SS
P1.24/TRACECLK VBAT
002aab733
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9397 750 14985 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet Rev. 01 — 3 October 2005 5 of 38
Philips Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
Fig 3. LPC2142 pinning
LPC2142
P0.21/PWM5/CAP1.3 P1.20/TRACESYNC
P0.22/CAP0.0/MAT0.0 P0.17/CAP1.2/SCK1/MAT1.2
RTXC1 P0.16/EINT0/MAT0.2/CAP0.2
P1.19/TRACEPKT3 P0.15/EINT2
RTXC2 P1.21/PIPESTAT0
V
SS
V
DD
V
DDA
V
SS
P1.18/TRACEPKT2 P0.14/EINT1/SDA1
P0.25/AD0.4/AOUT P1.22/PIPESTAT1
D+ P0.13/MAT1.1
D− P0.12/MAT1.0
P1.17/TRACEPKT1 P0.11/CAP1.1/SCL1
P0.28/AD0.1/CAP0.2/MAT0.2 P1.23/PIPESTAT2
P0.29/AD0.2/CAP0.3/MAT0.3 P0.10/CAP1.0
P0.30/AD0.3/EINT3/CAP0.0 P0.9/RXD1/PWM6/EINT3
P1.16/TRACEPKT0 P0.8/TXD1/PWM4
P0.31/UP_LED/CONNECT P1.27/TDO
V
SS
VREF
P0.0/TXD0/PWM1 XTAL1
P1.31/TRST XTAL2
P0.1/RXD0/PWM3/EINT0 P1.28/TDI
P0.2/SCL0/CAP0.0 V
SSA
V
DD
P0.23/V
BUS
P1.26/RTCK RESET
V
SS
P1.29/TCK
P0.3/SDA0/MAT0.0/EINT1 P0.20/MAT1.3/SSEL1/EINT3
P0.4/SCK0/CAP0.1/AD0.6 P0.19/MAT1.2/MOSI1/CAP1.2
P1.25/EXTIN0 P0.18/CAP1.3/MISO1/MAT1.3
P0.5/MISO0/MAT0.1/AD0.7 P1.30/TMS
P0.6/MOSI0/CAP0.2 V
DD
P0.7/SSEL0/PWM2/EINT2 V
SS
P1.24/TRACECLK VBAT
002aab734
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