智力抢答器vhdl程序

Release 10.1 - par K.31 (nt) Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved. Mon Nov 01 11:52:38 2010 INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are: 1. The <design name>_pad.txt file (this file) designed to provide information on IO usage in a human readable ASCII text format viewable through common text editors. 2. The <design namd>_pad.csv file for use with spreadsheet programs such as MS Excel. This file can also be read by PACE to communicate post PAR IO information. 3. The <design name>.pad file designed for parsing by customers. It uses the "|" as a data field separator. INPUT FILE: qiangdaqi_map.ncd OUTPUT FILE: qiangdaqi_pad.txt PART TYPE: xc3s200a SPEED GRADE: -4 PACKAGE: ft256 Pinout by Pin Number: +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ |Pin Number|Signal Name|Pin Usage |Pin Name |Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage |Constraint|DCI Value|IO Register|Signal Integrity| +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ |A1 | | |GND | | | | | | | | | | | | | |A2 | | |PROG_B | | | | | | | | | | | | | |A3 | |DIFFMTB |IO_L19P_0 |UNUSED | |0 | | | | | | | | | | |A4 | |DIFFMTB |IO_L18P_0 |UNUSED | |0 | | | | | | | | | | |A5 | |DIFFMTB |IO_L17P_0 |UNUSED | |0 | | | | | | | | | | |A6 | |DIFFMTB |IO_L15P_0 |UNUSED | |0 | | | | | | | | | | |A7 | |DIFFMTB |IO_L13P_0 |UNUSED | |0 | | | | | | | | | | |A8 | |DIFFMTB |IO_L12P_0/GCLK10 |UNUSED | |0 | | | | | | | | | | |A9 | |DIFFSTB |IO_L10N_0/GCLK7 |UNUSED | |0 | | | | | | | | | | |A10 | |DIFFSTB |IO_L08N_0 |UNUSED | |0 | | | | | | | | | | |A11 |seg<6> |IOB |IO_L07N_0 |OUTPUT |LVCMOS25* |0 |12 |SLOW |NONE** | | |LOCATED | |NO |NONE | |A12 |seg<4> |IOB |IO_L05N_0 |OUTPUT |LVCMOS25* |0 |12 |SLOW |NONE** | | |LOCATED | |NO |NONE | |A13 |seg<1> |IOB |IO_L04N_0 |OUTPUT |LVCMOS25* |0 |12 |SLOW |NONE** | | |LOCATED | |NO |NONE | |A14 | |DIFFMTB |IO_L04P_0 |UNUSED | |0 | | | | | | | | | | |A15 | | |TCK | | | | | | | | | | | | | |A16 | | |GND | | | | | | | | | | | | | |B1 | | |TDI | | | | | | | | | | | | | |B2 | | |TMS | | | | | | | | | | | | | |B3 | |DIFFSTB |IO_L19N_0 |UNUSED | |0 | | | | | | | | | | |B4 | |DIFFSTB |IO_L18N_0 |UNUSED | |0 | | | | | | | | | | |B5 | | |VCCO_0 | | |0 | | | | |2.50 | | | | | |B6 | |DIFFSTB |IO_L15N_0 |UNUSED | |0 | | | | | | | | | | |B7 | | |GND | | | | | | | | | | | | | |B8 | |DIFFSTB |IO_L12N_0/GCLK11 |UNUSED | |0 | | | | | | | | | | |B9 | | |VCCO_0 | | |0 | | | | |2.50 | | | | | |B10 | |DIFFMTB |IO_L08P_0 |UNUSED | |0 | | | | | | | | | | |B11 | | |GND | | | | | | | | | | | | | |B12 |seg<5> |IOB |IO_L05P_0 |OUTPUT |LVCMOS25* |0 |12 |SLOW |NONE** | | |LOCATED | |NO |NONE | |B13 | | |VCCO_0 | | |0 | | | | |2.50 | | | | | |B14 |seg<0> |IOB |IO_L02N_0 |OUTPUT |LVCMOS25* |0 |12 |SLOW |NONE** | | |LOCATED | |NO |NONE | |B15 | |DIFFMTB |IO_L02P_0/VREF_0 |UNUSED | |0 | | | | | | | | | | |B16 | | |TDO | | | | | | | | | | | | | |C1 | |DIFFSLR |IO_L01N_3 |UNUSED | |3 | | | | | | | | |