没有合适的资源?快使用搜索试试~ 我知道了~
e-C8051F36x-芯片资料介绍.pdf
1.该资源内容由用户上传,如若侵权请联系客服进行举报
2.虚拟产品一经售出概不退款(资源遇到问题,请及时私信上传者)
2.虚拟产品一经售出概不退款(资源遇到问题,请及时私信上传者)
版权申诉
0 下载量 145 浏览量
2022-07-04
10:06:52
上传
评论
收藏 3.1MB PDF 举报
温馨提示
试读
296页
e-C8051F36x-芯片资料介绍.pdf
资源推荐
资源详情
资源评论
Mixed Signal ISP Flash MCU Family
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 0.2 1/07 Copyright © 2007 by Silicon Laboratories C8051F36x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Analog Peripherals
- 10-Bit ADC (‘F360/1/2/6/7/8/9 only)
• Up to 200 ksps
• Up to 21 external single-ended or differential inputs
• VREF from internal VREF, external pin or V
DD
• Internal or external start of conversion source
• Built-in temperature sensor
- 10-Bit Current Output DAC
(‘F360/1/2/6/7/8/9 only)
- Two Comparators
• Programmable hysteresis and response time
• Configurable as interrupt or reset source
• Low current (TBD µA)
- Brown-out detector and POR Circuitry
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-
intrusive in-system debug (no emulator required)
- Provides breakpoints, single stepping,
inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- Low cost, complete development kit
Supply Voltage
- Range: 2.7–3.6 V (50 MIPS) 3.0–3.6 V (100 MIPS)
(See
Table 3.1)
- Power saving suspend and shutdown modes
High Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2
system clocks
- 100 MIPS or 50 MIPS throughput with on-chip PLL
- Expanded interrupt handler
- 2-cycle 16 x 16 MAC engine
Memory
- 1280 bytes internal data RAM (256 + 1024)
- 32 kB (‘F360/1/2/3/4/5/6/7) or 16 kB (‘F368/9) Flash;
In-system programmable in 1024-byte Sectors—
1024 bytes are reserved in the 32
kB devices
Digital Peripherals
- up to 39 Port I/O; All 5 V tolerant with high sink cur-
rent
- Hardware enhanced UART, SMBus™, and
enhanced SPI™ serial ports
- Four general purpose 16-bit counter/timers
- 16-Bit programmable counter array (PCA) with six
capture/compare modules
- Real time clock mode using PCA or timer and exter-
nal clock source
- External Memory Interface (EMIF)
Clock Sources
- Two internal oscillators:
• 24.5 MHz with ±2% accuracy supports crystal-less
UART operation
• 80/40/20/10 kHz low frequency, low power
- Flexible PLL technology
- External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
- Can switch between clock sources on-the-fly; useful
in power saving modes
Packages
- 48-pin TQFP (C8051F360/3)
- 32-pin LQFP (C8051F361/4/6/8)
- 28-pin QFN (C8051F362/5/7/9)
Temperature Range: –40 to +85 °C (See
Table 3.1)
ANALOG
PERIPHERALS
32/16 KB
ISP FLASH
1024 B
SRAM
POR
DEBUG
CIRCUITRY
FLEXIBLE
INTERRUPTS
8051 CPU
(100 or 50 MIPS)
DIGITAL I/O
HIGH-SPEED CONTROLLER CORE
CROSSBAR
WDT
Port 0
Port 1
Port 2
External Memory Interface
Port 4
Port 3
Port 3
48-pin only
16 x 16
MAC
Internal Oscillator /
LFO / PLL
UART
SMBus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
SPI
A
M
U
X
10-bit
200 ksps
ADC
TEMP
SENSOR
10-bit
Current
DAC
‘F360/1/2/6/7/8/9 only
VOLTAGE
COMPARATORS
+
-
+
-
C8051F360/1/2/3/4/5/6/7/8/9
2 Rev. 0.2
Rev. 0.2 3
C8051F360/1/2/3/4/5/6/7/8/9
Table of Contents
1. System Overview.................................................................................................... 19
1.1. CIP-51™ Microcontroller Core.......................................................................... 23
1.1.1. Fully 8051 Compatible.............................................................................. 23
1.1.2. Improved Throughput............................................................................... 23
1.1.3. Additional Features .................................................................................. 24
1.2. On-Chip Memory............................................................................................... 25
1.3. On-Chip Debug Circuitry................................................................................... 25
1.4. Programmable Digital I/O and Crossbar........................................................... 26
1.5. Serial Ports ....................................................................................................... 27
1.6. Programmable Counter Array........................................................................... 27
1.7. 10-Bit Analog to Digital Converter..................................................................... 28
1.8. Comparators ..................................................................................................... 29
1.9. 10-bit Current Output DAC................................................................................ 31
2. Absolute Maximum Ratings .................................................................................. 33
3. Global Electrical Characteristics .......................................................................... 34
4. Pinout and Package Definitions............................................................................ 37
5. 10-Bit ADC (ADC0, C8051F360/1/2/6/7/8/9)........................................................... 49
5.1. Analog Multiplexer ............................................................................................ 50
5.2. Temperature Sensor......................................................................................... 51
5.3. Modes of Operation .......................................................................................... 53
5.3.1. Starting a Conversion............................................................................... 53
5.3.2. Tracking Modes........................................................................................ 54
5.3.3. Settling Time Requirements..................................................................... 55
5.4. Programmable Window Detector...................................................................... 60
5.4.1. Window Detector In Single-Ended Mode ................................................. 62
5.4.2. Window Detector In Differential Mode...................................................... 63
6. 10-Bit Current Mode DAC (IDA0, C8051F360/1/2/6/7/8/9).................................... 65
6.1. IDA0 Output Scheduling ................................................................................... 65
6.1.1. Update Output On-Demand ..................................................................... 65
6.1.2. Update Output Based on Timer Overflow ................................................ 66
6.1.3. Update Output Based on CNVSTR Edge................................................. 66
6.2. IDAC Output Mapping....................................................................................... 66
7. Voltage Reference (C8051F360/1/2/6/7/8/9).......................................................... 69
8. Comparators........................................................................................................... 73
9. CIP-51 Microcontroller.......................................................................................... 83
9.1. Performance ..................................................................................................... 83
9.2. Programming and Debugging Support ............................................................. 84
9.3. Instruction Set................................................................................................... 85
9.3.1. Instruction and CPU Timing ..................................................................... 85
9.3.2. MOVX Instruction and Program Memory ................................................. 85
9.4. Memory Organization........................................................................................ 88
9.4.1. Program Memory...................................................................................... 89
9.4.2. Data Memory............................................................................................ 90
C8051F360/1/2/3/4/5/6/7/8/9
4 Rev. 0.2
9.4.3. General Purpose Registers...................................................................... 90
9.4.4. Bit Addressable Locations........................................................................ 90
9.4.5. Stack ....................................................................................................... 90
9.4.6. Special Function Registers....................................................................... 91
9.4.7. Register Descriptions ............................................................................. 105
9.5. Power Management Modes............................................................................ 107
9.5.1. Idle Mode................................................................................................ 108
9.5.2. Stop Mode.............................................................................................. 108
9.5.3. Suspend Mode ....................................................................................... 108
10.Interrupt Handler .................................................................................................. 111
10.1.MCU Interrupt Sources and Vectors............................................................... 111
10.2.Interrupt Priorities ........................................................................................... 111
10.3.Interrupt Latency............................................................................................. 111
10.4.Interrupt Register Descriptions....................................................................... 112
10.5.External Interrupts.......................................................................................... 117
11.Multiply And Accumulate (MAC0)....................................................................... 121
11.1.Special Function Registers............................................................................. 121
11.2.Integer and Fractional Math............................................................................ 122
11.3.Operating in Multiply and Accumulate Mode.................................................. 123
11.4.Operating in Multiply Only Mode .................................................................... 123
11.5.Accumulator Shift Operations......................................................................... 123
11.6.Rounding and Saturation................................................................................ 124
11.7.Usage Examples ............................................................................................ 124
11.7.1.Multiply and Accumulate Example......................................................... 124
11.7.2.Multiply Only Example............................................................................ 125
11.7.3.MAC0 Accumulator Shift Example......................................................... 125
12.Reset Sources....................................................................................................... 133
12.1.Power-On Reset............................................................................................. 134
12.2.Power-Fail Reset/VDD Monitor ...................................................................... 135
12.3.External Reset................................................................................................ 136
12.4.Missing Clock Detector Reset ........................................................................ 136
12.5.Comparator0 Reset ........................................................................................ 136
12.6.PCA Watchdog Timer Reset .......................................................................... 137
12.7.Flash Error Reset ........................................................................................... 137
12.8.Software Reset............................................................................................... 137
13.Flash Memory ....................................................................................................... 141
13.1.Programming the Flash Memory .................................................................... 141
13.1.1.Flash Lock and Key Functions............................................................... 141
13.1.2.Erasing Flash Pages From Software ..................................................... 142
13.1.3.Writing Flash Memory From Software.................................................... 142
13.1.4.Non-volatile Data Storage...................................................................... 143
13.2.Security Options ............................................................................................. 144
13.2.1.Summary of Flash Security Options....................................................... 145
13.3.Flash Write and Erase Guidelines.................................................................. 146
13.3.1.VDD Maintenance and the VDD Monitor ............................................... 146
Rev. 0.2 5
C8051F360/1/2/3/4/5/6/7/8/9
13.3.2.16.4.2 PSWE Maintenance.................................................................... 147
13.3.3.System Clock ......................................................................................... 147
13.4.Flash Read Timing ......................................................................................... 149
14.Branch Target Cache ........................................................................................... 151
14.1.Cache and Prefetch Operation....................................................................... 151
14.2.Cache and Prefetch Optimization................................................................... 152
15.External Data Memory Interface and On-Chip XRAM........................................ 159
15.1.Accessing XRAM............................................................................................ 159
15.1.1.16-Bit MOVX Example ........................................................................... 159
15.1.2.8-Bit MOVX Example............................................................................. 159
15.2.Configuring the External Memory Interface.................................................... 160
15.3.Port Configuration........................................................................................... 160
15.4.Multiplexed and Non-multiplexed Selection.................................................... 163
15.4.1.Multiplexed Configuration....................................................................... 163
15.4.2.Non-multiplexed Configuration............................................................... 164
15.5.Memory Mode Selection................................................................................. 165
15.5.1.Internal XRAM Only ............................................................................... 165
15.5.2.Split Mode without Bank Select.............................................................. 165
15.5.3.Split Mode with Bank Select................................................................... 166
15.5.4.External Only.......................................................................................... 166
15.6.Timing .......................................................................................................... 166
15.6.1.Non-multiplexed Mode........................................................................... 168
15.6.2.Multiplexed Mode................................................................................... 171
16.Oscillators............................................................................................................. 175
16.1.Programmable Internal High-Frequency (H-F) Oscillator............................... 175
16.1.1. Internal Oscillator Suspend Mode......................................................... 176
16.2.Programmable Internal Low-Frequency (L-F) Oscillator ................................ 177
16.2.1.Calibrating the Internal L-F Oscillator..................................................... 178
16.3.External Oscillator Drive Circuit...................................................................... 178
16.4.System Clock Selection.................................................................................. 179
16.5.External Crystal Example ............................................................................... 181
16.6.External RC Example ..................................................................................... 182
16.7.External Capacitor Example........................................................................... 182
16.8.Phase-Locked Loop (PLL).............................................................................. 183
16.8.1.PLL Input Clock and Pre-divider ............................................................ 183
16.8.2.PLL Multiplication and Output Clock ...................................................... 183
16.8.3.Powering on and Initializing the PLL...................................................... 184
17.Port Input/Output.................................................................................................. 189
17.1.Priority Crossbar Decoder .............................................................................. 191
17.2.Port I/O Initialization ....................................................................................... 193
17.3.General Purpose Port I/O............................................................................... 196
18.SMBus ................................................................................................................... 209
18.1.Supporting Documents................................................................................... 210
18.2.SMBus Configuration...................................................................................... 210
剩余295页未读,继续阅读
资源评论
书博教育
- 粉丝: 1
- 资源: 2835
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功