################################################################################
# Vivado (TM) v2016.4 (64-bit)
#
# README.txt: Please read the sections below to understand the steps required
# to simulate the design for a simulator, the directory structure
# and the generated exported files.
#
################################################################################
1. Simulate Design
To simulate design, cd to the simulator directory and execute the script.
For example:-
% cd questa
% ./top.sh
The export simulation flow requires the Xilinx pre-compiled simulation library
components for the target simulator. These components are referred using the
'-lib_map_path' switch. If this switch is specified, then the export simulation
will automatically set this library path in the generated script and update,
copy the simulator setup file(s) in the exported directory.
If '-lib_map_path' is not specified, then the pre-compiled simulation library
information will not be included in the exported scripts and that may cause
simulation errors when running this script. Alternatively, you can provide the
library information using this switch while executing the generated script.
For example:-
% ./top.sh -lib_map_path /design/questa/clibs
Please refer to the generated script header 'Prerequisite' section for more details.
2. Directory Structure
By default, if the -directory switch is not specified, export_simulation will
create the following directory structure:-
<current_working_directory>/export_sim/<simulator>
For example, if the current working directory is /tmp/test, export_simulation
will create the following directory path:-
/tmp/test/export_sim/questa
If -directory switch is specified, export_simulation will create a simulator
sub-directory under the specified directory path.
For example, 'export_simulation -directory /tmp/test/my_test_area/func_sim'
command will create the following directory:-
/tmp/test/my_test_area/func_sim/questa
By default, if -simulator is not specified, export_simulation will create a
simulator sub-directory for each simulator and export the files for each simulator
in this sub-directory respectively.
IMPORTANT: Please note that the simulation library path must be specified manually
in the generated script for the respective simulator. Please refer to the generated
script header 'Prerequisite' section for more details.
3. Exported script and files
Export simulation will create the driver shell script, setup files and copy the
design sources in the output directory path.
By default, when the -script_name switch is not specified, export_simulation will
create the following script name:-
<simulation_top>.sh (Unix)
When exporting the files for an IP using the -of_objects switch, export_simulation
will create the following script name:-
<ip-name>.sh (Unix)
Export simulation will create the setup files for the target simulator specified
with the -simulator switch.
For example, if the target simulator is "ies", export_simulation will create the
'cds.lib', 'hdl.var' and design library diectories and mappings in the 'cds.lib'
file.
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FPGA DDS产生波形及AM FM调制解调原理vivado代码
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viviFPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理FPGA用DDS出波的过程以及AM、FM调制解调原理
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FPGA DDS产生波形及AM FM调制解调原理vivado代码 (208个子文件)
xsim.ini.bak 16KB
elaborate.bat 441B
compile.bat 324B
simulate.bat 284B
runme.bat 229B
runme.bat 229B
cos_8_1024_signed.coe 7KB
cos_8_1024_signed.coe 7KB
cos_8_1024_signed.coe 7KB
cos_8_1024_signed.coe 7KB
cos_8_1024_signed.coe 7KB
cos_8_1024_signed.coe 7KB
cos_8_1024_signed.coe 7KB
cos_8_1024_signed.coe 7KB
cos_8_1024_signed.coe 7KB
cos_8_1024_signed.coe 7KB
xsim.dbg 79KB
ROM.dcp 31KB
ROM.dcp 31KB
ROM.dcp 31KB
ROM.dcp 31KB
cos_make.dcp 27KB
compile.do 675B
compile.do 661B
compile.do 655B
compile.do 637B
simulate.do 321B
simulate.do 310B
simulate.do 310B
elaborate.do 193B
simulate.do 183B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
simulate.do 11B
xsimk.exe 232KB
run.f 465B
xsim.ini 16KB
xsim.ini 16KB
xsimSettings.ini 737B
vivado_11420.backup.jou 3KB
vivado.jou 763B
vivado.jou 726B
vivado.jou 719B
ISEWrap.js 7KB
ISEWrap.js 7KB
rundef.js 1KB
rundef.js 1KB
runme.log 16KB
vivado.log 7KB
vivado_11420.backup.log 4KB
runme.log 4KB
runme.log 3KB
runme.log 3KB
elaborate.log 2KB
summary.log 972B
summary.log 972B
summary.log 972B
summary.log 972B
summary.log 972B
summary.log 972B
summary.log 972B
summary.log 972B
summary.log 972B
xvlog.log 732B
compile.log 732B
simulate.log 370B
xsimkernel.log 324B
xsimcrash.log 0B
DDS_TEST.lpr 290B
xsim.mem 14KB
ROM.mif 9KB
ROM.mif 9KB
ROM.mif 9KB
ROM.mif 9KB
ROM.mif 9KB
ROM.mif 9KB
ROM.mif 9KB
ROM.mif 9KB
ROM.mif 9KB
ROM.mif 9KB
elab.opt 198B
vivado.pb 27KB
vivado.pb 5KB
xelab.pb 4KB
xvlog.pb 1KB
ROM_utilization_synth.pb 276B
cos_make_utilization_synth.pb 276B
tb_cos_vlog.prj 334B
vlog.prj 117B
xsim.reloc 13KB
xil_defaultlib.rlx 448B
ROM_utilization_synth.rpt 7KB
cos_make_utilization_synth.rpt 7KB
.vivado.begin.rst 181B
.vivado.begin.rst 180B
.Vivado_Synthesis.queue.rst 0B
.vivado.end.rst 0B
.vivado.end.rst 0B
共 208 条
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