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Banana Pi BPI-M1开发板硬件原理图
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2024-05-17
17:05:59
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Banana Pi BPI-M1开发板硬件原理图 Banana Pi BPI-M1开发板硬件原理图 1.去掉Camera的电源LDO 2.CON1的PIN2 2、36、37、38、40、 3、5 分别改为CSI0-PWR-EN、HPR、HPL、IPSOUT、IPSOUT、VCC-CSI、GND 3.CVBS增加串联电阻R103,R70改为49.9欧姆 4.CON2的PIN7、10分别改为LCDIO-03、PWM0 5.EMAC-PWR-EN增加下拉电阻R179,R123改为13K 6.J3供电合并为一路,增加220uF钽电容 7.增加电源指示灯D7,IO灯D8 8.R75改为100uF钽电容 9.C73、C74、C97、C88、C82、C92改为22uF-6.3V 10.增加C78 11.USB和HDMI增加共模滤波器 12.SD卡数据线预留上拉电阻 13.HDMI差分线预留并联电阻位置
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BLOCK
RESETPOWER ON
Ethernet 1000/100/10M
Camera
OSC
5V
MAIN CHIP
A20 BGA-441PIN
PMU AXP209
Micro USB
Power System
32768Hz24MHz
USB2
Audio Codec
MIC
USB0
HeadSet
USB1
HDMI
CSI0/TS
HDMI OUT
GMAC
CVBS
TVOUT
USB HOST
USB DEVICE
BACKUP BAT
RTC
Ext Port 1
UART2,3,5,6
TWI4
SPI0,1
TWI1
LCD
LCD(RGB/LVDS)
TWI0
TP
CAN
PWM0
IR-OUT
TWI2
EEPROM
EEPROM
SATA
DDR3 2X16SD Card
SD/MMC 0 DRAMC
HDD
2.5''
Differential pairs
Z0= 90 ohm +/-5 ohm
Differential pairs
Z0= 100ohm +/-5 ohm
Z0= 50ohm +/-5 ohm
3V
TWI3
UART0
Ext Port 2
ADC0
UART7
Ext Port 3
GPIO
Design Name
Size Page Name Rev
Date: Sheet of
BLOCK
1.4
A20_Banana_Pi
A3
113Monday, December 16, 2013
Design Name
Size Page Name Rev
Date: Sheet
of
BLOCK
1.4
A20_Banana_Pi
A3
113Monday, December 16, 2013
Design Name
Size Page Name Rev
Date: Sheet
of
BLOCK
1.4
A20_Banana_Pi
A3
113Monday, December 16, 2013
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU1
SA4
SA3
SA2
SA1
SA0
SA9
SA8
SA7
SA6
SA5
SA15
SA14
SA13
SA12
SA11
SA10
SDQM2
SDQM1
SDQM0
SDQS2
SDQSB1
SDQS1
SDQSB0
SDQS0
SDQM3
SBA1
SBA0
SDQSB3
SDQS3
SDQSB2
SBA2
SDQ4
SDQ3
SDQ2
SDQ1
SDQ0
SDQ17
SDQ9
SDQ8
SDQ7
SDQ6
SDQ5
SDQ14
SDQ13
SDQ12
SDQ11
SDQ10
SDQ22
SDQ21
SDQ20
SDQ18
SDQ16
SDQ15
SDQ27
SDQ26
SDQ25
SDQ24
SDQ23
SDQ19
SDQ31
SDQ30
SDQ29
SDQ28
SA[15:0]
SDQ[31:0]
SDQM[3:0]
SBA[2:0]
SDQS[3:0]
SDQSB[3:0]
VCC-3V3
INTVDD
VCC-3V3
VCC-3V3
VCC-3V3
VCC-3V3
INTVDD
VCC-CSI
VCC-3V3
DRAM-VCC
GND
INTVDD
CPUVDD
GND
VDD25-SATA
VCC-3V3
INTVDD
DRAM-VCC
VCC-PA
CSI0-D3
CSI0-D4
CSI0-D5
CSI0-MCLK
CSI0-D6
CSI0-HSYNC
CSI0-D7
CSI0-VSYNC
CSI0-D0
CSI0-D1
CSI0-D2
CSI0-PCLK
SCKE
SCK
SCK-N
SCAS
SWE
SRST
SRAS
SODT
SCS
SA[15:0]
SDQ[31:0]
SDQM[3:0]
SBA[2:0]
SDQS[3:0]
CPU-REF
SDQSB[3:0]
Design Name
Size Page Name Rev
Date: Sheet
of
CPU1
1.4
A20_Banana_Pi
A3
213Monday, December 16, 2013
Design Name
Size Page Name Rev
Date: Sheet
of
CPU1
1.4
A20_Banana_Pi
A3
213Monday, December 16, 2013
Design Name
Size Page Name Rev
Date: Sheet
of
CPU1
1.4
A20_Banana_Pi
A3
213Monday, December 16, 2013
FBGA441-A20
U1-2
FBGA441C80P19X19
VCC0-DRAM
G5
VCC1-DRAM
H5
VCC2-DRAM
L5
VCC3-DRAM
M5
VCC4-DRAM
R5
VCC5-DRAM
T5
VCC6-DRAM
W5
VCC7-DRAM
W6
VCC8-DRAM
W7
VCC9-DRAM
Y6
VDD0-DLL
M8
VDD1-DLL
N9
VDD2-DLL
P9
VDD0-CPU
H11
VDD1-CPU
H12
VDD2-CPU
H13
VDD3-CPU
H14
VDD4-CPU
J12
VDD5-CPU
J13
VDD0-SYS
J15
VDD1-SYS
J16
VDD2-SYS
K9
VDD3-SYS
K10
VDD4-SYS
K15
VDD5-SYS
L8
VDD6-SYS
L9
VDD7-SYS
R9
VDD8-SYS
R10
VDD9-SYS
T8
VCC0
H8
VCC1
H9
VCC2
H15
VCC3
J8
VCC4
J9
VCC5
J14
GND0
G3
GND1
G4
GND2
J5
GND3
K5
GND4
N5
GND5
P5
GND6
U5
GND7
V5
GND8
Y7
GND9
Y8
GND10
M9
GND11
N10
GND12
P10
GND13
J11
GND14
K11
GND15
K12
GND16
K13
GND17
L10
GND18
L11
GND19
L12
GND20
M10
GND21
M11
GND22
M12
GND23
M13
GND24
N11
GND25
N12
GND26
P11
GND27
P12
GND28
R11
GND29
R12
GND30
T11
GND31
T12
GND32
W9
GND33
W10
GND34
W11
GND35
K14
GND36
L13
GND37
L14
NC0
R16
GND44
W18
GND33-TVIN
Y18
GND25-TVIN
AA18
GND38
M14
GND39
N13
GND40
N14
GND43
P13
GND42
P14
GND41
R13
NC1
R14
VCC0-PC
H19
VCC1-PC
J19
VCC-PE
F19
VCC0-PA
H10
VCC1-PA
J10
VCC0-USB
L16
VCC1-USB
L15
VDD-USB
K16
VCC-PF
N19
VCC0-LVDS
W12
VCC1-LVDS
W13
VCC2-LVDS
W14
VCC33-TVOUT
W15
VCC33-TVIN
W16
VDD25-TVIN
W17
VDD25-0-SATA
N15
VDD25-1-SATA
N16
VDD12-0-SATA
M15
VDD12-1-SATA
M16
VCC-HDMI
T13
VCC-PG
E18
H1 H2 H3 H4
R1
240R-1%
R0402
DRAM
NAND
TS0/CSI0
TS1/CSI1
FBGA441-A20
U1-1
FBGA441C80P19X19
SDQ0
AC7
SDQ1
AC4
SDQ2
AC8
SDQ3
AB5
SDQ4
AB7
SDQ5
AB8
SDQ6
AB4
SDQ7
AC3
SDQ8
AA1
SDQ9
AC1
SDQ10
Y1
SDQ11
AB2
SDQ12
AC2
SDQ13
W2
SDQ14
AB3
SDQ15
Y2
SDQ16
T2
SDQ17
N2
SDQ18
U2
SDQ19
P1
SDQ20
T1
SDQ21
U1
SDQ22
N1
SDQ23
M2
SDQ24
J1
SDQ25
L1
SDQ26
H1
SDQ27
K2
SDQ28
L2
SDQ29
G2
SDQ30
M1
SDQ31
H2
SVREF0
H3
SVREF1
H4
SVREF2
Y5
SVREF3
AA8
SDQS0
AB6
SDQS0#
AC5
SDQS1
AB1
SDQS1#
AA2
SDQS2
R1
SDQS2#
P2
SDQS3
K1
SDQS3#
J2
SDQM0
AC6
SDQM1
W1
SDQM2
R2
SDQM3
G1
SCK#
V2
SCK
V1
SCKE
N3
SCK1
J4
SA0
W4
SA1
R4
SA2
U4
SA3
M4
SA4
Y4
SA5
N4
SA6
V4
SA7
M3
SA8
AA3
SA9
P4
SA10
L3
SA11
W3
SA12
P3
SA13
Y3
SA14
R3
SBA0
K3
SBA1
L4
SBA2
K4
SWE
T3
SCAS
U3
SRAS
T4
SCS0
V3
SA15
AA4
SZQ
AA7
SRST
AA6
SDDBG0
P8
SDDBG1
R8
SADBG
N8
NWE#/SPI0_MOSI/PC0
M23
NALE/SPI0_MISO/PC1
M22
NCLE/SPI0_CLK/PC2
L23
NCE1/PC3
L22
NCE0/PC4
K23
NRE#/PC5
K22
NRB0/SDC2_CMD/PC6
J23
NRB1/SDC2_CLK/PC7
J22
NDQ0/SDC2_D0/PC8
H23
NDQ1/SDC2_D1/PC9
H22
NDQ2/SDC2_D2/PC10
G23
NDQ3/SDC2_D3/PC11
G22
NDQ4/PC12
H21
NDQ5/PC13
H20
NDQ6/PC14
G21
NDQ7/PC15
G20
NWP/PC16
M21
NCE2/PC17
F23
NCE3/PC18
F22
NCE4/SPI2_CS0/PC19
L21
NCE5/SPI2_CLK/PC20
K21
NCE6/SPI2_MOSI/PC21
J21
NCE7/SPI2_MISO/PC22
J20
SPI0_CS0/PC23
G19
NDQS/PC24
F21
TS0_CLK/CSI0_PCLK/PE0
E23
TS0_ERR/CSI0_MCLK/PE1
E22
TS0_SYNC/CSI0_HSYNC/PE2
D23
TS0_DVLD/CSI0_VSYNC/PE3
D22
TS0_D0/CSI0_D0/PE4
C23
TS0_D1/CSI0_D1/PE5
C22
TS0_D2/CSI0_D2/PE6
B23
TS0_D3/CSI0_D3/PE7
B22
TS0_D4/CSI0_D4/PE8
A23
TS0_D5/CSI0_D5/PE9
A22
TS0_D6/CSI0_D6/PE10
B21
TS0_D7/CSI0_D7/PE11
A21
TS1_CLK/CSI1_PCLK/SDC1_CMD/PG0
F20
TS1_ERR/CSI1_MLCK/SDC1_CLK/PG1
E21
TS1_SYNC/CSI1_HSYNC/SDC1_D0/PG2
E20
TS1_DVLD/CSI1_VSYNC/SDC1_D1/PG3
D21
TS1_D0/CSI1_D0/SDC1_D2/CSI0_D8/PG4
D20
TS1_D1/CSI1_D1/SDC1_D3/CSI0_D9/PG5
C21
TS1_D2/CSI1_D2/UART3_TX/CSI0_D10/PG6
E19
TS1_D3/CSI1_D3/UART3_RX/CSI0_D11/PG7
C20
TS1_D4/CSI1_D4/UART3_RTS/CSI0_D12/PG8
D19
TS1_D5/CSI1_D5/UART3_CTS/CSI0_D13/PG9
C19
TS1_D6/CSI1_D6/UART4_TX/CSI0_D14/PG10
D18
TS1_D7/CSI1_D7/UART4_RX/CSI0_D15/PG11
C18
ODT
AA5
SCK1#
J3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU2
AVCC
VCC-3V3
VCC-3V3
VCC-RTC
GND
GND
GND
HTX0P
HTX0N
HTX1P
HTX1N
HTX2P
HTX2N
HTXCP
HTXCN
HSCL
HSDA
HHPD
ERXDV
ETXD0
RESET#
HPL
CLK32K-IN
UART0-TX
SD0-D1
CLK32K-OUT
SD0-D0
UART0-RX
EMDC
SD0-CLK
DM2
DP2
SD0-CMD
OSC24MI
HPR
OSC24MO
DM0
SD0-D3
TWI1-SCK
DP0
SD0-D2
TWI1-SDA
DM1
DP1
EMDIO
ERXD3
ETXEN
ERXD2
ETXCK
ERXD1
ECRS
ERXD0
ECOL
ETXD3
ERXCK
ETXD2
ERXERR
ETXD1
ETXERR
TV-OUT3
TXP-SATA
TXN-SATA
RXP-SATA
RXN-SATA
REXT-SATAPMU-SCK
PMU-SDA
NMI#
UART2_RX
UART2_TX
UART2_CTS
VRA1
VRA2
VRP
LRADC0
HPBP
HPCOM
HPCOM-FB
MICIN1
VMIC
CAN_TX
CAN_RX
UBOOT
LCD0-D16
LCD0-D17
LCD0-D18
LCD0-D0
LCD0-D1
LCD0-D2
LCD0-CLK
LCD0-D3
LCD0-DE
LCD0-D4
LCD0-HSYNC
LCD0-D19
LCD0-VSYNC
LCD0-D20
LCD0-D21
LCD0-D22
LCD0-D23
LCD0-D5
LCD0-D6
LCD0-D7
LCD0-D8
LCD0-D9
LCD0-D10
LCD0-D11
LCD0-D12
LCD0-D13
LCD0-D14
LCD0-D15
TWI2-SCK
TWI2-SDA
TWI3-SCK
TWI3-SDA
SPI0_CS0
SPI0_CLK
SPI0_MOSI
SPI0_MISO
HCEC
UART2_RTS
PWM0
SPI0_CS1
EMAC-PWR-EN
LRADC1
UART7_TX
UART7_RX
PWM1
CSI0-STBY-EN
CSI1-STBY-EN
CSI0-PWR-EN
CSI0-RESET#
CSI1-RESET#
CSI-FLASH
UART3_TX
UART3_RX
PH2
LCD0-CS
LCD0-IO0
LCD0-IO1
LCD0-IO2
PH3
IR-IN
USB0-DRV
USB0-IDDET
PH5
SD0-DET
ADC_X1
ADC_X2
ADC_Y1
ADC_Y2
FMINL
FMINR
LINEINL
LINEINR
CSI-IO0
LCDIO-03
LED1
Design Name
Size Page Name Rev
Date: Sheet
of
CPU2
1.4
A20_Banana_Pi
A3
313Monday, December 16, 2013
Design Name
Size Page Name Rev
Date: Sheet
of
CPU2
1.4
A20_Banana_Pi
A3
313Monday, December 16, 2013
Design Name
Size Page Name Rev
Date: Sheet
of
CPU2
1.4
A20_Banana_Pi
A3
313Monday, December 16, 2013
SYS Ctrl
IR
UART
PS2
SPI
TWI
MISC
CARD0
EINT
AUDIO INT
AUDIO CODEC
USB
CARD3
CLK SRC
FBGA441-A20
U1-3
FBGA441C80P19X19
RXD3/SPI1_CS0/UART2_RTS/PA0
D5
RXD2/SPI1_CLK/UART2_CTS/PA1
E5
RXD1/SPI1_MOSI/UART2_TX/PA2
D6
RXD0/SPI1_MISO/UART2_RX/PA3
E6
TXD3/SPI1_CS1/PA4
D7
TXD2/SPI3_CS0/PA5
E7
TXD1/SPI3_CLK/PA6
D8
TXD0/SPI3_MOSI/PA7
E8
RXCK/SPI3_MISO/PA8
D9
ERXERR/SPI3_CS1/I2S1_MCLK/PA9
E9
ERXDV/GRXCTL/UART1_TX/PA10
D10
MDC/UART1_RX/PA11
E10
MDIO/UART6_TX/UART1_RTS/PA12
D11
ETXEN/GTXCTL/UART6_RX/UART1_CTS/PA13
E11
ETXCK/UART7_TX/UART1_DTR/I2S1_BCLK/PA14
D12
ECRS/GTXCK/UART7_RX/UART1_DSR/I2S1_LRCK/PA15
E12
ECOL/GCLKIN/CAN_TX/UART1_DCD/I2S1_DO/PA16
D13
ETXERR/CAN_RX/UART1_RING/I2S1_DI/PA17
C13
TWI0_SCK/PB0
A15
TWI0_SDA/PB1
B15
TWI1_SCK/PB18
A8
TWI1_SDA/PB19
B8
TWI2_SCK/PB20
C8
TWI2_SDA/PB21
C7
SPI0_CS0/UART5_TX/EINT22/PI10
C17
SPI0_CLK/UART5_RX/EINT23/PI11
D17
SPI0_MOSI/UART6_TX/CLK_OUT_A/EINT24/PI12
C16
SPI0_MISO/UART6_RX/CLK_OUT_B/EINT25/PI13
D16
PS2_SCK1/TCLKIN0/EINT26/SPI0_CS1/PI14
C15
PS2_SDA1/TCLKIN1/EINT27/SPI1_CS1/PI15
D15
UART0_TX/IR1_TX/PB22
A7
UART0_RX/IR1_RX/PB23
B7
IR0_TX/SPDIF_MCLK/STANBYWFI/PB3
B14
IR0_RX/PB4
A13
JTAG_MS0/SPI2_CS0/PB14
A10
JTAG_CK0/SPI2_CLK/PB15
B10
JTAG_DO0/SPI2_MOSI/PB16
A9
JTAG_DI0/SPI2_MISO/PB17
B9
TEST
H16
JTAG_SEL
T10
UBOOT_SEL
W8
VDDQE
T9
NMI#
F5
RESET#
C14
X32KI
F1
X32KO
F2
X24MI
N23
X24MO
N22
VDD-RTC
K8
PLLTEST
T15
VCC-PLL
P16
PLLDV
T16
PLLVREG
R15
AVCC
T19
VRA1
W20
VRA2
V20
VRP
W21
SDC0_D1/JTAG_MS1/PF0
M20
SDC0_D0/JTAG_DI1/PF1
M19
SDC0_CLK/UART0_TX/PF2
L20
SDC0_CMD/JTAG_DO1/PF3
L19
SDC0_D3/UART0_RX/PF4
K20
SDC0_D2/JTAG_CK1/PF5
K19
SDC3_CMD/PI4
A18
SDC3_CLK/PI5
B18
SDC3_D0/PI6
A17
SDC3_D1/PI7
B17
SDC3_D2/PI8
A16
SDC3_D3/PI9
B16
EINT28/SPI1_CS0/UART2_RTS/PI16
E17
EINT29/SPI1_CLK/UART2_CTS/PI17
E16
EINT30/SPI1_MOSI/UART2_TX/PI18
E15
EINT31/SPI1_MISO/UART2_RX/PI19
D14
I2S_MCLK/AC97_MCLK/PB5
B13
I2S_BCLK/AC97_BCLK/PB6
A12
I2S_LRCK/AC97_SYNC/PB7
B12
I2S_DO0/AC97_DO/PB8
A11
I2S_DO1/PB9
C12
I2S_DO2/PB10
C11
I2S_DO3/PB11
C10
I2S_DI/AC97_DI/SPDIF_DI/PB12
C9
SPI2_CS1/SPDIF_DO/PB13
B11
PHOUTN
AC23
PHOUTP
AC22
FMINL
Y20
FMINR
Y21
VMIC
AA21
MICIN1
AC20
MICIN2
AC21
LINEINL
AB20
LINEINR
AB21
HPOUTR
W19
HPCOM
AA19
HPCOMFB
AA20
VCC-HP
AB19
HPBP
AC19
HPOUTL
Y19
DM0
N20
DP0
N21
DM1
P20
DP1
P21
DM2
R20
TWI3_SCK/PI0
A20
TWI3_SDA/PI1
B20
TWI4_SCK/PI2
A19
AGND
U19
PLLGND
P15
DP2
R21
PWM1/TWI4_SDA/PI3
B19
HPGND
V19
TV
SATA
HDMI
ADC
PWM
TP
LCD1
LCD0
FBGA441-A20
U1-4
FBGA441C80P19X19
TVIN0
AC18
TVIN1
AB18
TVIN2
AA17
TVIN3
Y17
VRP_TVIN
AA16
VRN_TVIN
Y16
TVOUT0
AC16
TVOUT1
AB16
TVOUT2
AC17
TVOUT3
AB17
TXP_SATA
T20
TXM_SATA
T21
RXP_SATA
U21
RXM_SATA
U20
REXT_SATA
V21
CLKP_SATA
R19
CLKM_SATA
P19
TX0P_HDMI
V23
TX0N_HDMI
V22
TX1P_HDMI
U23
TX1N_HDMI
U22
TX2P_HDMI
T23
TX2N_HDMI
T22
TXCP_HDMI
W23
TXCN_HDMI
W22
VREG1_HDMI
T14
SCL_HDMI
R23
SDA_HDMI
R22
PWM0/PB2
A14
HSCL/UART7_TX/PS2_SCK0/PI20
E14
HSDA/UART7_RX/PS2_SDA0/PI21
E13
X1_TP
Y22
X2_TP
AA22
Y1_TP
Y23
Y2_TP
AA23
HPD_HDMI
P22
CEC_HDMI
P23
LCD0_D0/LVDS0_VP0/PD0
AB15
LCD0_D1/LVDS0_VN0/PD1
AC15
LCD0_D2/LVDS0_VP1/PD2
AB14
LCD0_D3/LVDS0_VN1/PD3
AC14
LCD0_D4/LVDS0_VP2/PD4
AB13
LCD0_D5/LVDS0_VN2/PD5
AC13
LCD0_D6/LVDS0_VPC/PD6
AB12
LCD0_D7/LVDS0_VNC/PD7
AC12
LCD0_D8/LVDS0_VP3/PD8
AB11
LCD0_D9/LVDS0_VN3/PD9
AC11
LCD0_D10/LVDS1_VP0/PD10
Y15
LCD0_D11/LVDS1_VN0/PD11
AA15
LCD0_D12/LVDS1_VP1/PD12
Y14
LCD0_D13/LVDS1_VN1/PD13
AA14
LCD0_D14/LVDS1_VP2/PD14
Y13
LCD0_D15/LVDS1_VN2/PD15
AA13
LCD0_D16/LVDS1_VPC/PD16
Y12
LCD0_D17/LVDS1_VNC/PD17
AA12
LCD0_D18/LVDS1_VP3/PD18
Y11
LCD0_D19/LVDS1_VN3/PD19
AA11
LCD0_D20/CSI1_MCLK/PD20
Y10
LCD0_D21/SMC_VPPEN/PD21
AA10
LCD0_D22/SMC_VPPPP/PD22
AB10
LCD0_D23/SMC_DET/PD23
AC10
LCD0_CLK/SMC_VCCEN/PD24
Y9
LCD0_DE/SMC_RST/PD25
AA9
LCD0_HSYNC/SMC_SLK/PD26
AB9
LCD0_VSYNC/SMC_SDA/PD27
AC9
LCD1_D0/UART3_TX/EINT0/CSI1_D0/PH0
A6
LCD1_D1/UART3_RX/EINT1/CSI1_D1/PH1
B6
LCD1_D2/UART3_RTS/EINT2/CSI1_D2/PH2
C6
LCD1_D3/UART3_CTS/EINT3/CSI1_D3/PH3
A5
LCD1_D4/UART4_TX/EINT4/CSI1_D4/PH4
B5
LCD1_D5/UART4_RX/EINT5/CSI1_D5/PH5
C5
LCD1_D6/UART5_TX/MS_BS/EINT6/CSI1_D6/PH6
A4
LCD1_D7/UART5_RX/MS_CLK/EINT7/CSI1_D7 /PH7
B4
LCD1_D8/ERXD3/KP_IN0/MS_D0/EINT8/CSI1_D8/PH8
C4
LCD1_D9/ERXD2/KP_IN1/MS_D1/EINT9/CSI1_D9/PH9
D4
LCD1_D10/ERXD1/KP_IN2/MS_D2/EINT10/CSI1_D10/PH10
A3
LCD1_D11/ERXD0/KP_IN3/MS_D3/EINT11/CSI1_D11/PH11
B3
LCD1_D12/PS2_SCK1/EINT12/CSI1_D12/PH12
C3
LCD1_D13/PS2_SDA1/SMC_RST/EINT13/CSI1_D13/PH13
A2
LCD1_D14/ETXD3/KP_IN4/SMC_VPPEN/EINT14/CSI1_D14/PH14
B2
LCD1_D15/ETXD2/KP_IN5/SMC_VPPPP/EINT15/CSI1_D15/PH15
A1
LCD1_D16/ETXD1/KP_IN6/SMC_DET/EINT16/CSI1_D16/PH16
B1
LCD1_D17/ETXD0/KP_IN7/SMC_VCCEN/EINT17/CSI1_D17/PH17
C1
LCD1_D18/ERXCK/KP_OUT0/SMC_SLK/EINT18/CSI1_D18/PH18
C2
LCD1_D19/ERXERR/KP_OUT1/SMC_SDA/EINT19/CSI1_D19/PH19
D1
LCD1_D20/ERXDV/CAN_TX/EINT20/CSI1_D20/PH20
D2
LCD1_D21/EMDC/CAN_RX/EINT21/CSI1_D21/PH21
D3
LCD1_D22/EMDIO/KP_OUT2/SDC1_CMD/CSI1_D22/PH22
E1
LCD1_D23/ETXEN/KP_OUT3/SDC1_CLK/CSI1_D23/PH23
E2
LCD1_CLK/ETXCK/KP_OUT4/SDC1_D0/CSI1_PCLK/PH24
E3
LCD1_DE/ECRS/KP_OUT5/SDC1_D1/CSI1_FIELD/PH25
E4
LCD1_HSYNC/ECOL/KP_OUT6/SDC1_D2/CSI1_HSYNC/PH26
F3
LCD1_VSYNC/ETXERR/KP_OUT7/SDC1_D3/CSI1_VSYNC/PH27
F4
LRADC0
AB23
LRADC1
AB22
TP2
TP1
剩余12页未读,继续阅读
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