################################################################################
# Vivado (TM) v2022.1 (64-bit)
#
# README.txt: Please read the sections below to understand the steps required
# to simulate the design for a simulator, the directory structure
# and the generated exported files.
#
################################################################################
1. Simulate Design
To simulate design, cd to the simulator directory and execute the script.
For example:-
% cd questa
% ./top.sh
The export simulation flow requires the Xilinx pre-compiled simulation library
components for the target simulator. These components are referred using the
'-lib_map_path' switch. If this switch is specified, then the export simulation
will automatically set this library path in the generated script and update,
copy the simulator setup file(s) in the exported directory.
If '-lib_map_path' is not specified, then the pre-compiled simulation library
information will not be included in the exported scripts and that may cause
simulation errors when running this script. Alternatively, you can provide the
library information using this switch while executing the generated script.
For example:-
% ./top.sh -lib_map_path /design/questa/clibs
Please refer to the generated script header 'Prerequisite' section for more details.
2. Directory Structure
By default, if the -directory switch is not specified, export_simulation will
create the following directory structure:-
<current_working_directory>/export_sim/<simulator>
For example, if the current working directory is /tmp/test, export_simulation
will create the following directory path:-
/tmp/test/export_sim/questa
If -directory switch is specified, export_simulation will create a simulator
sub-directory under the specified directory path.
For example, 'export_simulation -directory /tmp/test/my_test_area/func_sim'
command will create the following directory:-
/tmp/test/my_test_area/func_sim/questa
By default, if -simulator is not specified, export_simulation will create a
simulator sub-directory for each simulator and export the files for each simulator
in this sub-directory respectively.
IMPORTANT: Please note that the simulation library path must be specified manually
in the generated script for the respective simulator. Please refer to the generated
script header 'Prerequisite' section for more details.
3. Exported script and files
Export simulation will create the driver shell script, setup files and copy the
design sources in the output directory path.
By default, when the -script_name switch is not specified, export_simulation will
create the following script name:-
<simulation_top>.sh (Unix)
When exporting the files for an IP using the -of_objects switch, export_simulation
will create the following script name:-
<ip-name>.sh (Unix)
Export simulation will create the setup files for the target simulator specified
with the -simulator switch.
For example, if the target simulator is "xcelium", export_simulation will create the
'cds.lib', 'hdl.var' and design library diectories and mappings in the 'cds.lib'
file.
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利用OTSU阈值算法进行图像二值化,结果用HDMI显示 (1158个子文件)
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
xsim.ini.bak 26KB
elaborate.bat 1KB
simulate.bat 972B
compile.bat 854B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
design_1.bd 272B
HDMI_display_Demon.bit 3.86MB
design_1.bxml 604B
xsim_2.c 162KB
photo.coe 2.64MB
rgb_init.coe 1.94MB
gray.coe 1.16MB
gray.coe 1.16MB
gray.coe 1.16MB
gray.coe 1.16MB
gray.coe 1.16MB
gray.coe 1.16MB
gray.coe 1.16MB
gray.coe 1.16MB
gray.coe 1.16MB
test.coe 1.14MB
test.coe 1.14MB
image.coe 227B
image.coe 227B
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
otsu_num_1_RAM_AUTO_1R1W.dat 4KB
Advantiv_DGL_1280_1024_CEA.dat 1KB
Advantiv_DGL_1080P_CEA.dat 1KB
Advantiv_DGL_720P_CEA.dat 1KB
dgl_1080p_cea.data 2KB
dgl_1280_1024_cea.data 2KB
dgl_720p_cea.data 2KB
xsim.dbg 56KB
HDMI_display_Demon_routed.dcp 14.36MB
HDMI_display_Demon_placed.dcp 12.71MB
HDMI_display_Demon_opt.dcp 10.17MB
otsu_0.dcp 6.73MB
otsu_0.dcp 6.73MB
otsu_0.dcp 6.72MB
rom_ip.dcp 796KB
rom_ip.dcp 796KB
rom_ip.dcp 795KB
ila_0.dcp 728KB
ila_0.dcp 728KB
ila_0.dcp 728KB
rom_ip.dcp 670KB
ila_0.dcp 622KB
ila_0.dcp 588KB
ila_0.dcp 556KB
dbg_hub.dcp 357KB
HDMI_FPGA_ML_0.dcp 58KB
HDMI_FPGA_ML_0.dcp 58KB
rom_ip.dcp 54KB
HDMI_display_Demon.dcp 43KB
rom_ip.dcp 30KB
HDMI_display_Demon.dcp 25KB
clk_wiz_0.dcp 12KB
clk_wiz_0.dcp 12KB
clk_wiz_0.dcp 12KB
clk_wiz_0.dcp 12KB
compile.do 4KB
compile.do 4KB
compile.do 4KB
compile.do 4KB
compile.do 816B
compile.do 800B
compile.do 742B
compile.do 742B
compile.do 730B
compile.do 730B
compile.do 726B
compile.do 712B
compile.do 674B
compile.do 674B
compile.do 664B
compile.do 664B
simulate.do 572B
simulate.do 564B
simulate.do 564B
compile.do 444B
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