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基于FPGA设计的电梯控制电路系统源码+全部资料齐全.zip
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基于FPGA设计的电梯控制电路系统源码+全部资料齐全.zip （106个子文件） 
__synthesis_is_complete__ 0B runme.bat 219B runme.bat 219B elevator_design.bit 2.09MB elevator_design_routed.dcp 229KB elevator_design_placed.dcp 207KB elevator_design_opt.dcp 164KB elevator_design.dcp 48KB
基于FPGA设计的电梯系统.docx 12.78MB
usage_statistics_webtalk.html 29KB vivado.jou 763B vivado.jou 758B ISEWrap.js 7KB ISEWrap.js 7KB rundef.js 1KB rundef.js 1KB runme.log 26KB runme.log 26KB elevator_design.lpr 335B vivado.pb 44KB route_design.pb 12KB place_design.pb 12KB opt_design.pb 11KB write_bitstream.pb 4KB init_design.pb 2KB elevator_design_power_summary_routed.pb 722B elevator_design_utilization_placed.pb 276B elevator_design_utilization_synth.pb 276B vivado.pb 149B elevator_design_timing_summary_routed.pb 52B elevator_design_methodology_drc_routed.pb 52B elevator_design_route_status.pb 44B elevator_design_drc_opted.pb 37B elevator_design_drc_routed.pb 37B elevator_design_bus_skew_routed.pb 30B elevator_design_io_placed.rpt 72KB elevator_design_methodology_drc_routed.rpt 17KB elevator_design_clock_utilization_routed.rpt 12KB elevator_design_utilization_placed.rpt 9KB elevator_design_timing_summary_routed.rpt 8KB elevator_design_power_routed.rpt 8KB elevator_design_utilization_synth.rpt 7KB elevator_design_control_sets_placed.rpt 5KB elevator_design_drc_routed.rpt 3KB elevator_design_drc_opted.rpt 2KB elevator_design_bus_skew_routed.rpt 934B elevator_design_route_status.rpt 588B elevator_design_power_routed.rpx 87KB elevator_design_methodology_drc_routed.rpx 25KB elevator_design_timing_summary_routed.rpx 17KB elevator_design_drc_routed.rpx 2KB elevator_design_drc_opted.rpx 2KB elevator_design_bus_skew_routed.rpx 1KB .route_design.begin.rst 180B .opt_design.begin.rst 180B .write_bitstream.begin.rst 180B .place_design.begin.rst 180B .init_design.begin.rst 180B .vivado.begin.rst 179B .vivado.begin.rst 177B .vivado.end.rst 0B .init_design.end.rst 0B .Vivado_Implementation.queue.rst 0B .write_bitstream.end.rst 0B .route_design.end.rst 0B .opt_design.end.rst 0B .place_design.end.rst 0B .vivado.end.rst 0B .Vivado_Synthesis.queue.rst 0B ISEWrap.sh 2KB ISEWrap.sh 2KB runme.sh 1KB runme.sh 1KB elevator_design.tcl 6KB elevator_design.tcl 3KB
htr.txt 406B htr.txt 398B README.txt 129B elevator_design.v 3KB mealy_state_change.v 3KB digital_show.v 2KB abs2rela.v 2KB mealyStateChange.v 522B counter.v 387B elevator_design.vdi 26KB elevator_design.vds 26KB synthesis.wdf 5KB gui_handlers.wdf 5KB project.wdf 4KB java_command_handlers.wdf 2KB synthesis_details.wdf 97B project.wpc 117B elevator_design.xdc 6KB elevator_design_propImpl.xdc 5KB usage_statistics_webtalk.xml 42KB gen_run.xml 8KB webtalk_pa.xml 5KB gen_run.xml 3KB hw.xml 776B vrs_config_4.xml 521B共 106 条
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