avalon接口规范最新标准_avalon总线协议资源-CSDN文库

Avalon

Aval

5星 · 超过95%的资源需积分: 16 119 浏览量 2010-03-03 20:12:59 上传评论收藏 895KB PDF 举报

资源推荐

资源详情

资源评论

101 Innovation Drive

San Jose, CA 95134

www.altera.com

Avalon Interface

Specifications

Document Version: 1.1

Document Date: October 2008

Altera Corporation i

Table of Contents

1.1. Avalon Properties and Parameters ..................................................................................................1–4

1.2. Signal Types ........................................................................................................................................1–4

1.3. Interface Timing .................................................................................................................................1–5

1.4. Related Documents ............................................................................................................................1–5

2.1. Clock Input (Sink) ..............................................................................................................................2–1

2.1.1. Properties ...............................................................................................................................2–2

2.1.2. Signal Types ..........................................................................................................................2–2

2.1.3. associatedClock Interfaces ..................................................................................................2–2

2.2. Clock Output (Source) .......................................................................................................................2–2

2.2.1. Properties ...............................................................................................................................2–3

2.2.2. Signal Types ..........................................................................................................................2–3

3.1. Introduction .........................................................................................................................................3–1

3.2. Slaves ....................................................................................................................................................3–3

3.3. Slave Interface Properties ..................................................................................................................3–5

3.4. Slave Timing ........................................................................................................................................3–8

3.4.1. Synchronous Interface .........................................................................................................3–8

3.4.2. Performance ..........................................................................................................................3–8

3.4.3. Electrical Characteristics .....................................................................................................3–8

3.5. Slave Transfers ....................................................................................................................................3–8

3.5.1. Typical Slave Read and Write Transfers ...........................................................................3–8

3.5.2. Slave Read and Write Transfers with Fixed Wait-States ................................................3–9

3.5.3. Pipelined Transfers ............................................................................................................3–10

3.5.3.1. Slave Pipelined Read Transfer with Variable Latency ....................................... 3–11

3.5.3.2. Restrictions ................................................................................................................ 3–12

3.5.3.3. Slave Pipelined Read Transfer with Fixed Latency ............................................ 3–12

3.5.4. Burst Transfers ....................................................................................................................3–13

3.5.4.1. Slave Write Bursts .................................................................................................... 3–14

3.5.4.2. Slave Read Bursts ..................................................................................................... 3–15

3.5.4.3. Line–Wrapped Bursts .............................................................................................. 3–16

3.5.4.4. Flow Control ............................................................................................................. 3–17

3.6. Address Alignment ...........................................................................................................................3–17

3.7. Masters ...............................................................................................................................................3–19

3.8. Master Signal Types ..........................................................................................................................3–20

3.9. Master Interface Properties ..............................................................................................................3–23

3.10. Master Transfers ..............................................................................................................................3–24

3.10.1. Master Pipelined Read Transfer .....................................................................................3–25

3.10.2. Burst Transfers ..................................................................................................................3–27

3.10.2.1. Master Write Bursts ............................................................................................... 3–27

3.10.2.2. Master Read Bursts ................................................................................................ 3–28

4.1. Interrupt Sender ..................................................................................................................................4–1

4.1.1. Signal Types ..........................................................................................................................4–1

ii Altera Corporation

Avalon Interface Specifications

Table of Contents

4.1.2. Interrupt Sender Properties ................................................................................................4–2

4.2. Interrupt Receiver ...............................................................................................................................4–2

4.2.1. Interrupt Receiver Properties .............................................................................................4–3

4.2.2. Signal Types ..........................................................................................................................4–3

4.2.3. Interrupt Timing ...................................................................................................................4–3

5.1. Tristate Slave Signal Types ................................................................................................................5–2

5.1.1. address Behavior ..................................................................................................................5–3

5.1.2. outputenable and read Behavior ........................................................................................5–4

5.1.3. write_n and writebyteenable Behavior .............................................................................5–4

5.1.4. Interfacing to Synchronous Off-Chip Memory ................................................................5–5

5.2. Tristate Slave Properties ....................................................................................................................5–6

5.3. Slave Transfers ....................................................................................................................................5–6

5.3.1. Asynchronous Transfers .....................................................................................................5–6

5.3.1.1. Setup Time .................................................................................................................. 5–7

5.3.1.2. Hold Time ................................................................................................................... 5–8

5.3.1.3. Example Read and Write Using Setup, Hold and Wait Times ........................... 5–8

5.3.2. Synchronous Transfers ......................................................................................................5–10

5.3.3. Pipelined Slave Read Transfers ........................................................................................5–10

5.4. Master Transfers ................................................................................................................................5–12

6.1. Introduction .........................................................................................................................................6–1

6.1.1. Features ..................................................................................................................................6–2

6.1.2. Terms and Concepts ............................................................................................................6–2

6.2. Avalon-ST Interface Signals ..............................................................................................................6–3

6.2.1. Signal Polarity .......................................................................................................................6–4

6.2.2. Signal Sequencing and Timing ...........................................................................................6–5

6.2.2.1. Synchronous Interface ............................................................................................... 6–5

6.2.2.2. Clock Enables .............................................................................................................. 6–5

6.3. Avalon-ST Interface Properties .........................................................................................................6–5

6.4. Typical Data Transfers .......................................................................................................................6–6

6.4.1. Signal Details ........................................................................................................................6–6

6.4.2. Data Layout ...........................................................................................................................6–7

6.5. Data Transfer without Backpressure ................................................................................................6–8

6.6. Data Transfer with Backpressure .....................................................................................................6–9

6.7. Packet Data Transfers .......................................................................................................................6–10

6.7.1. Signal Details ......................................................................................................................6–11

6.7.2. Protocol Details ...................................................................................................................6–11

7.1. Properties .............................................................................................................................................7–2

7.2. Signals ...................................................................................................................................................7–2

Document Revision History ..................................................................................................................Info–1

How to Contact Altera ...........................................................................................................................Info–1

Typographic Conventions .....................................................................................................................Info–2