MIPS® Architecture For Programmers Volume II-A: The MIPS32® Instruction Set, Revision 5.03
Copyright © 2001-2003,2005,2008-2013 MIPS Technologies Inc. All rights reserved.
Template: nB1.03, Built with tags: 2B ARCH FPU_PS FPU_PSandARCH MIPS32
Unpublished rights (if any) reserved under the copyright laws of the United States of America and other countries.
This document contains information that is proprietary to MIPS Technologies, Inc. ("MIPS Technologies") one of the Imagination Technologies Group plc
companies. Any copying, reproducing, modifying or useofthisinformation(inwholeorinpart)thatisnotexpressly permitted in writing by MIPS Technologies
or an authorized third party is strictly prohibited. At a minimum, this information is protected under unfair competition and copyright laws. Violations thereof
may result in criminal penalties and fines.
Any document provided in source format (i.e., in a modifiable form such as in FrameMaker or Microsoft Word format) is subject to use and distribution
restrictions that are independent of and supplemental to any and all confidentiality restrictions. UNDER NO CIRCUMSTANCES MAY A DOCUMENT
PROVIDED IN SOURCE FORMAT BE DISTRIBUTED TO A THIRD PARTY IN SOURCE FORMAT WITHOUT THE EXPRESS WRITTEN
PERMISSION OF MIPS TECHNOLOGIES, INC.
MIPS Technologies reserves the right to change the information contained in this document to improve function, design or otherwise. MIPS Technologies does
not assume any liability arising out of the application or use of this information, or of any error or omission in such information. Any warranties, whether
express, statutory, implied or otherwise, including but not limited to the implied warranties of merchantability or fitness for a particular purpose, are excluded.
Except as expressly provided in any written license agreement from MIPS Technologies or an authorized third party, the furnishing of this document does not
give recipient any license to any intellectual property rights, including any patent rights, that cover the information in this document.
The information contained in this document shall not be exported, re-exported, transferred, or released, directly or indirectly, in violation of the law of any
country or international law, regulation, treaty, Executive Order, statute, amendments or supplements thereto. Should a conflict arise regarding the export, re-
export, transfer, or release of the information contained in this document, the laws of the United States of America shall be the governing law.
The information contained in this document constitutes one or more of the following: commercial computer software, commercial computer software
documentation, or other commercial items. If the user of this information, or any related documentation of any kind, including related technical data or manuals,
is an agency, department, or other entity of the United States government ("Government"), the use, duplication, reproduction, release, modification, disclosure,
or transfer of this information, or any related documentation of any kind, is restricted in accordance with Federal Acquisition Regulation 12.212 for civilian
agencies and Defense Federal Acquisition Regulation Supplement 227.7202 for military agencies. The use of this information by the Government is further
restricted in accordance with the terms of the license agreement(s) and/or applicable contract terms and conditions covering this information from MIPS
Technologies or an authorized third party.
MIPS, MIPS I, MIPS II, MIPS III, MIPS IV, MIPS V, MIPSr3, MIPS32, MIPS64, microMIPS32, microMIPS64, MIPS-3D, MIPS16, MIPS16e, MIPS-Based,
MIPSsim, MIPSpro, MIPS-VERIFIED, Aptiv logo, microAptiv logo, interAptiv logo, microMIPS logo, MIPS Technologies logo, MIPS-VERIFIED logo,
proAptiv logo, 4K, 4Kc, 4Km, 4Kp, 4KE, 4KEc, 4KEm, 4KEp, 4KS, 4KSc, 4KSd, M4K, M14K, 5K, 5Kc, 5Kf, 24K, 24Kc, 24Kf, 24KE, 24KEc, 24KEf, 34K,
34Kc, 34Kf, 74K, 74Kc, 74Kf, 1004K, 1004Kc, 1004Kf, 1074K, 1074Kc, 1074Kf, R3000, R4000, R5000, Aptiv, ASMACRO, Atlas, "At the core of the user
experience.", BusBridge, Bus Navigator, CLAM, CorExtend, CoreFPGA, CoreLV, EC, FPGA View, FS2, FS2 FIRST SILICON SOLUTIONS logo, FS2
NAVIGATOR, HyperDebug, HyperJTAG, IASim, iFlowtrace, interAptiv, JALGO, Logic Navigator, Malta, MDMX, MED, MGB, microAptiv, microMIPS,
Navigator, OCI, PDtrace, the Pipeline, proAptiv, Pro Series, SEAD-3, SmartMIPS, SOC-it, and YAMON are trademarks or registered trademarks of MIPS
Technologies, Inc. in the United States and other countries.
All other trademarks referred to herein are the property of their respective owners.