#!/bin/sh
UVM_HOME="/opt/Synopsys/Verdi2015/share/vmlib/uvm/uvm-1.1d/lib/src"
#echo $UVM_HOME
vcs \
+acc +vpi +v2k -sverilog -CFLAGS -DVCS \
+incdir+$UVM_HOME/src \
$UVM_HOME/uvm_pkg.sv \
$UVM_HOME/src/dpi/uvm_dpi.cc \
-timescale=1ns/1ps \
+incdir+../bench \
+incdir+../rtl \
../bench/top_tb.sv \
-full_64 -debug_all \
-l run.log \
\
\
-R +UVM_TESTNAME=my_case1 +UVM_TIMEOUT="10000ns, YES"
# here to excute in order to write in run.log
#./simv +UVM_TESTNAME=my_case0
#./simv +UVM_TESTNAME=my_case0 +uvm_set_inst_override="my_monitor,new_monitor,uvm_test_top.env.o_agt.mon"
#./simv +UVM_TESTNAME=$1
#./simv +UVM_TESTNAME=my_case0 +uvm_set_type_override="my_monitor,new_monitor"
#./simv +UVM_TESTNAME=my_case0 +UVM_TIMEOUT="300ns, YES"
#./simv +UVM_TESTNAME=my_case0 +UVM_VERBOSITY=UVM_DEBUG
UVM_adder程序.zip
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2020-12-04
11:55:50
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UVM_adder程序.zip （16个子文件） 
sim 
run_tc.sh 796B bench my_transaction.sv 640B my_driver.sv 1KB golden.sv 187B my_scoreboard.sv 2KB my_case0.sv 1KB my_model.sv 1KB top_tb.sv 1KB my_monitor.sv 2KB my_if.sv 220B base_test.sv 929B my_agent.sv 1KB my_sequencer.sv 272B my_case1.sv 1KB my_env.sv 2KB rtl adder.v 855B
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