This example shows how to use a register model in a block level environment.
To compile and run the simulation, please use the make file:
make all - Compile and run
make rtl - Compile the rtl
make tb - Compile the structural level of the test bench
make build - Compile the ovm part of the test bench
make sim - Run the simulation in command line mode
The Makefile assumes the use of Questa 10.0b or a later version with
built-in support for the UVM.
By default, the make file runs the spi_reg_test, but the package also
contains:
spi_interrupt_test
spi_poll_test
The tests are defined in the test directory.
eetop.cn_Uvm_spi_bl_reg_tb.zip_APB-SPI_UVM_apb tb_apb uvm_reg uv
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eetop.cn_Uvm_spi_bl_reg_tb.zip （48个子文件） 
tb_build block_level_tbs spi_tb sequences 
spi_virtual_seq_lib_pkg.sv 5KB spi_bus_sequence_lib_pkg.sv 13KB spi_sequence_lib_pkg.sv 2KB uvm_register_model spi_reg_pkg.sv 16KB test spi_poll_test.svh 2KB spi_reg_test.svh 2KB spi_interrupt_test.svh 2KB spi_test_lib_pkg.sv 1KB spi_test_base.svh 4KB tb intr_if.sv 935B top_tb.sv 2KB sim 
README.txt 616B Makefile 2KB env spi_env_config.svh 2KB spi_scoreboard.svh 9KB spi_reg_functional_coverage.svh 3KB spi_env_pkg.sv 1KB spi_env.svh 5KB rtl spi rtl verilog timescale.v 23B spi_clgen.v 5KB spi_top.v 10KB spi_defines.v 6KB spi_shift.v 9KB doc 
spi.pdf 77KB spi_v0.7.pdf 120KB src 
spi.doc 183KB agents spi_agent spi_seq_item.svh 4KB spi_seq.svh 2KB spi_monitor.svh 3KB spi_sequencer.svh 1KB spi_agent.svh 3KB spi_if.sv 978B spi_agent_pkg.sv 1KB spi_agent_config.svh 2KB spi_driver.svh 2KB apb_agent apb_seq.svh 2KB apb_sequencer.svh 1KB apb_write_seq.svh 2KB apb_coverage_monitor.svh 2KB apb_driver.svh 3KB apb_agent_pkg.sv 1KB apb_monitor.svh 3KB apb_read_seq.svh 2KB apb_seq_item.svh 4KB apb_if.sv 437B reg2apb_adapter.svh 2KB apb_agent.svh 3KB apb_agent_config.svh 2KB
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