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算法与数据结构设计课件-PRAM.pdf
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2023-06-12
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Parallel Random Access Machines (PRAMs)
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Parallel Random Access Machines (PRAMs)
Basically, that’s what you get when you dream von Neumann’s dream
in parallel.
Bunch of synchronous processors (with little local memory), shared
memory; in each step, each processor can access a memory cell in
unit time (read or write), or perform local computation.
Design of Algorithms. . . Part 3 2021/22 3 / 70
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Various models:
EREW (exclusive read, exclusive write)
CREW (concurrent read, exclusive write)
CRCW (concurrent read, concurrent write)
Here: problems with concurrent writes
▶
common: all the same
▶
priority: processors are sorted by priority; if more than one want to
write, highest priority wins
▶
arbitrary: well, arbitrary one wins
▶
majority: many sub-models (>half, relative majority, . . . )
Obviously: EREW “≤” CREW “≤” CRCW
T Design of Algorithms. . . Part 3 2021/22 4 / 70
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A few comments
PRAMs in general, and CRCWs in particular, are theoretical models.
No real success with building (large) one. . .
(On the other hand, consider multi-core processors!)
They are, however, extremely nice when one wants to develop parallel
algorithms without having to care about, say, network structure.
The developer can concentrate on algorithmic aspects, rather than
messy technical details.
There are a few ways to (more or less) automatically transform
PRAM algorithms into “real” ones.
Design of Algorithms. . . Part 3 2021/22 5 / 70
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