W29N01HVDINF（NANDFLASH）资源-CSDN文库

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W29N01HV

Release Date: Oct 15, 2015

1 Revision A

W29N01HV

1G-BIT 3.3V

NAND FLASH MEMORY

W29N01HV

Release Date: Oct 15, 2015

2 Revision A

Table of Contents

1. GENERAL DESCRIPTION ............................................................................................................... 6

2. FEATURES ....................................................................................................................................... 6

3. PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................... 7

3.1 Pin assignment 48-pin TSOP1(x8) ....................................................................................... 7

3.2 Pin assignment 48 ball VFBGA (x8) ..................................................................................... 8

3.3 Pin assignment 63 ball VFBGA ............................................................................................ 9

3.4 Pin Descriptions .................................................................................................................. 10

4. PIN DESCRITPIONS ...................................................................................................................... 11

4.1 Chip Enable (#CE) .............................................................................................................. 11

4.2 Write Enable (#WE) ............................................................................................................ 11

4.3 Read Enable (#RE) ............................................................................................................ 11

4.4 Address Latch Enable (ALE) .............................................................................................. 11

4.5 Command Latch Enable (CLE) .......................................................................................... 11

4.6 Write Protect (#WP) ............................................................................................................ 11

4.7 Ready/Busy (RY/#BY) ........................................................................................................ 11

4.8 Input and Output (I/Ox) ....................................................................................................... 11

5. BLOCK DIAGRAM .......................................................................................................................... 12

6. MEMORY ARRAY ORGANIZATION .............................................................................................. 13

6.1 Array Organization (x8) ...................................................................................................... 13

7. MODE SELECTION TABLE ........................................................................................................... 14

8. COMMAND TABLE......................................................................................................................... 15

9. DEVICE OPERATIONS .................................................................................................................. 16

9.1 READ operation .................................................................................................................. 16

9.1.1 PAGE READ (00h-30h)......................................................................................................... 16

9.1.2 RANDOM DATA OUTPUT (05h-E0h) ................................................................................... 17

9.1.3 READ ID (90h) ...................................................................................................................... 17

9.1.4 READ PARAMETER PAGE (ECh) ....................................................................................... 18

9.1.5 READ STATUS (70h)............................................................................................................ 21

9.2 PROGRAM operation ......................................................................................................... 22

9.2.1 PAGE PROGRAM (80h-10h) ................................................................................................ 22

9.2.2 SERIAL DATA INPUT (80h) .................................................................................................. 22

9.2.3 RANDOM DATA INPUT (85h) .............................................................................................. 23

9.3 COPY BACK operation....................................................................................................... 24

9.3.1 READ for COPY BACK (00h-35h) ........................................................................................ 24

9.3.2 PROGRAM for COPY BACK (85h-10h) ................................................................................ 24

9.4 BLOCK ERASE operation .................................................................................................. 26

9.4.1 BLOCK ERASE (60h-D0h) .................................................................................................... 26

9.5 RESET operation ................................................................................................................ 27

9.5.1 RESET (FFh) ........................................................................................................................ 27

9.6 WRITE PROTECT .............................................................................................................. 28

10. ELECTRICAL CHARACTERISTICS............................................................................................... 30

10.1 Absolute Maximum Ratings ................................................................................................ 30

10.2 Operating Ranges .............................................................................................................. 30

W29N01HV

Release Date: Oct 15, 2015

3 Revision A

10.3 Device power-up timing ...................................................................................................... 31

10.4 DC Electrical Characteristics .............................................................................................. 32

10.5 AC Measurement Conditions ............................................................................................. 33

10.6 AC timing characteristics for Command, Address and Data Input ..................................... 34

10.7 AC timing characteristics for Operation .............................................................................. 35

10.8 Program and Erase Characteristics ................................................................................... 36

11. TIMING DIAGRAMS ....................................................................................................................... 37

12. INVALID BLOCK MANAGEMENT .................................................................................................. 46

12.1 Invalid blocks ...................................................................................................................... 46

12.2 Initial invalid blocks ............................................................................................................. 46

12.3 Error in operation ................................................................................................................ 47

12.4 Addressing in program operation ....................................................................................... 48

13. PACKAGE DIMENSIONS ............................................................................................................... 49

13.1 TSOP 48-pin 12x20 ............................................................................................................ 49

13.2 Fine-Pitch Ball Grid Array 48-ball ....................................................................................... 50

13.3 Fine-Pitch Ball Grid Array 63-ball ....................................................................................... 51

14. ORDERING INFORMATION .......................................................................................................... 52

15. VALID PART NUMBERS ................................................................................................................ 53

16. REVISION HISTORY ...................................................................................................................... 54

W29N01HV

Release Date: Oct 15, 2015

4 Revision A

List of Tables

Table 3.1 Pin Descriptions .......................................................................................................................... 10

Table 6.1 Addressing .................................................................................................................................. 13

Table 7.1 Mode Selection ........................................................................................................................... 14

Table 8.1 Command Table.......................................................................................................................... 15

Table 9.1 Device ID and configuration codes for Address 00h................................................................... 18

Table 9.2 ONFI identifying codes for Address 20h ..................................................................................... 18

Table 9.3 Parameter Page Output Value .................................................................................................... 20

Table 9.4 Status Register Bit Definition ...................................................................................................... 21

Table 10.1 Absolute Maximum Ratings ...................................................................................................... 30

Table 10.3 Operating Ranges ..................................................................................................................... 30

Table 10.5 DC Electrical Characteristics .................................................................................................... 32

Table 10.7 AC Measurement Conditions .................................................................................................... 33

Table 10.9 AC timing characteristics for Command, Address and Data Input ........................................... 34

Table 10.11 AC timing characteristics for Operation .................................................................................. 35

Table 10.13 Program and Erase Characteristics ........................................................................................ 36

Table 12.1 Valid Block Number .................................................................................................................. 46

Table 12.2 Block failure ............................................................................................................................... 47

Table 15.1 Part Numbers for Industrial Temperature ................................................................................. 53

Table 16.1 History Table ............................................................................................................................. 54

W29N01HV

Release Date: Oct 15, 2015

5 Revision A

List of Figures

Figure 3-1 Pin Assignment 48-pin TSOP1 (Package code S) ...................................................................... 7

Figure 3-2 Pin Assignment 48-ball VFBGA (Package code D) ..................................................................... 8

Figure 3-3 Pin Assignment 63-ball VFBGA (Package Code B) .................................................................... 9

Figure 5-3 NAND Flash Memory Block Diagram ........................................................................................ 12

Figure 6-1 Array Organization ..................................................................................................................... 13

Figure 9-1 Page Read Operations .............................................................................................................. 16

Figure 9-2 Random Data Output ................................................................................................................. 17

Figure 9-3 Read ID ...................................................................................................................................... 17

Figure 9-4 Read Parameter Page ............................................................................................................... 18

Figure 9-5 Read Status Operation .............................................................................................................. 21

Figure 9-6 Page Program ............................................................................................................................ 22

Figure 9-7 Random Data Input ................................................................................................................... 23

Figure 9-8 Copy Back Program Operation .................................................................................................. 25

Figure 10-1 Power ON/OFF sequence ....................................................................................................... 31

Figure 11-1 Command Latch Cycle ............................................................................................................ 37

Figure 11-2 Address Latch Cycle ................................................................................................................ 37

Figure 11-3 Data Latch Cycle ..................................................................................................................... 38

Figure 11-4 Serial Access Cycle after Read ............................................................................................... 38

Figure 11-5 Serial Access Cycle after Read (EDO) .................................................................................... 39

Figure 11-6 Read Status Operation ............................................................................................................ 39

Figure 11-7 Page Read Operation .............................................................................................................. 40

Figure 11-8 #CE Don't Care Read Operation ............................................................................................. 40

Figure 11-9 Random Data Output Operation .............................................................................................. 41

Figure 11-10 Read ID .................................................................................................................................. 42

Figure 11-11 Page Program........................................................................................................................ 42

Figure 11-12 #CE Don't Care Page Program Operation ............................................................................ 43

Figure 11-13 Page Program with Random Data Input ................................................................................ 43

Figure 11-14 Copy Back ............................................................................................................................. 44

Figure 11-15 Block Erase ............................................................................................................................ 44

Figure 11-16 Reset ..................................................................................................................................... 45

Figure 12-1 flow chart of create initial invalid block table ........................................................................... 47

Figure 12-2 Bad block Replacement ........................................................................................................... 48

Figure 13-1 TSOP 48-PIN 12X20mm ......................................................................................................... 49

Figure 13-2 Fine-Pitch Ball Grid Array 48-Ball ............................................................................................ 50

Figure 13-3 Fine-Pitch Ball Grid Array 63-Ball (9x11mm) .......................................................................... 51

Figure 14-1 Ordering Part Number Description .......................................................................................... 52