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fpga通过vivado实现uart-tx
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2024-04-16
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uart_tx.zip （78个子文件） 
3200432030_王鹏麒_电信201_作业5.pdf 319KB
project_1 project_1.cache sim 
ssm.db 538B compile_simlib riviera vcs modelsim xcelium activehdl questa wt xsim.wdf 256B project.wpc 61B vivado_7612.backup.log 17KB vivado_13152.backup.log 21KB .Xil Vivado-7612-DESKTOP-C4MUTIU project_1.srcs sim_1 new tb_txd.v 1KB sources_1 new uart_tx.v 2KB uart_tx_fsm.v 3KB vivado_18052.backup.jou 1KB project_1.ip_user_files 
README.txt 130B vivado.log 15KB vivado_13152.backup.jou 1KB vivado_7292.backup.log 12KB vivado_14044.backup.jou 1KB vivado_14044.backup.log 15KB vivado.jou 1KB project_1.sim sim_1 behav xsim tb_txd_behav.wdb 14KB compile.bat 876B xsim.ini 40B elaborate.bat 1KB glbl.v 2KB xvlog.log 0B simulate.log 25B elaborate.log 548B compile.log 0B tb_txd_vlog.prj 345B xvlog.pb 16B tb_txd.tcl 460B xelab.pb 986B uart_tx_behav.wdb 13KB simulate.bat 916B xsim.dir tb_txd_behav 
xsimk.exe 74KB xsim.rlx 723B obj xsim_1.win64.obj 4KB xsim_1.c 6KB xsim_0.win64.obj 15KB xsim.mem 4KB xsim.type 24B xsimkernel.log 320B xsim.xdbg 2KB xsim.dbg 10KB Compile_Options.txt 206B xsim.rtti 190B TempBreakPointFile.txt 29B xsim.svtype 39B xsim.reloc 2KB xsimSettings.ini 1KB xsimcrash.log 0B uart_tx_behav xsimk.exe 69KB xsim.rlx 727B obj xsim_1.win64.obj 3KB xsim_1.c 5KB xsim_0.win64.obj 10KB xsim.mem 3KB xsim.type 24B xsimkernel.log 322B xsim.xdbg 1KB xsim.dbg 9KB Compile_Options.txt 208B xsim.rtti 190B TempBreakPointFile.txt 29B xsim.svtype 39B xsim.reloc 1KB xsimSettings.ini 1KB xsimcrash.log 0B xil_defaultlib uart_tx.sdb 3KB tb_txd.sdb 2KB uart_tx_fsm.sdb 4KB xil_defaultlib.rlx 823B glbl.sdb 4KB uart_tx.tcl 460B project_1.hw project_1.lpr 290B vivado_18052.backup.log 30KB vivado_7612.backup.jou 1KB project_1.xpr 11KB vivado_7292.backup.jou 1002B
3200432030_王鹏麒_电信201_作业5.doc 146KB资源评论
