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fpga-vivado：将10MHz输入时钟以2分频、4分频、8分频、256分频输出
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2024-01-18
13:27:38
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project_2.zip （56个子文件） 
project_2 project_2.ip_user_files 
README.txt 130B project_2.hw 
project_2.lpr 290B project_2.cache compile_simlib riviera vcs modelsim xcelium ies activehdl questa wt xsim.wdf 239B java_command_handlers.wdf 767B webtalk_pa.xml 4KB project.wpc 61B gui_handlers.wdf 3KB project_2.xpr 9KB project_2.sim sim_1 behav xsim div4_tb_vlog.prj 283B webtalk_19988.backup.jou 757B compile.bat 832B xsim.ini 40B elaborate.bat 909B glbl.v 1KB xvlog.log 362B simulate.log 162B elaborate.log 730B compile.log 362B webtalk.jou 756B webtalk_19524.backup.log 876B webtalk_19524.backup.jou 757B webtalk_8132.backup.jou 756B xvlog.pb 662B webtalk.log 875B xelab.pb 1KB webtalk_19988.backup.log 876B div4_tb.tcl 461B simulate.bat 795B xsim.dir xil_defaultlib xil_defaultlib.rlx 402B div4.sdb 3KB glbl.sdb 4KB div4_tb.sdb 1KB div4_tb_behav 
xsimk.exe 70KB xsim.rlx 763B obj xsim_1.win64.obj 3KB xsim_1.c 5KB xsim_0.win64.obj 10KB xsim.mem 3KB xsim.type 24B xsimkernel.log 321B xsim.xdbg 952B xsim.dbg 7KB Compile_Options.txt 248B xsim.rtti 190B webtalk xsim_webtalk.tcl 4KB usage_statistics_ext_xsim.wdm 1KB .xsim_webtallk.info 65B TempBreakPointFile.txt 29B xsim.svtype 39B xsim.reloc 1KB xsimSettings.ini 1KB xsimcrash.log 0B div4_tb_behav.wdb 13KB webtalk_8132.backup.log 875B project_2.srcs sim_1 new div4_tb.v 860B sources_1 new div4.v 2KB资源评论
