XC7K410T实现SD卡读写数据【Verilog HDL驱动】 （182个子文件） 
__synthesis_is_complete__ 0B __synthesis_is_complete__ 0B runme.bat 305B runme.bat 305B runme.bat 305B top_sd_rw.bit 15.14MB top_sd_rw_routed.dcp 410KB top_sd_rw_physopt.dcp 374KB top_sd_rw_placed.dcp 374KB top_sd_rw_opt.dcp 259KB top_sd_rw.dcp 112KB clk_wiz_0.dcp 12KB clk_wiz_0.dcp 12KB clk_wiz_0.dcp 12KB pll_clk.dcp 10KB vivado.jou 1KB vivado.jou 950B vivado.jou 925B vivado.jou 920B ISEWrap.js 8KB ISEWrap.js 8KB ISEWrap.js 8KB rundef.js 1KB rundef.js 1KB rundef.js 1KB runme.log 35KB runme.log 23KB vivado.log 20KB runme.log 18KB ip_upgrade.log 3KB top_sd_rw.lpr 343B vivado.pb 36KB vivado.pb 28KB place_design.pb 23KB route_design.pb 15KB opt_design.pb 11KB init_design.pb 5KB write_bitstream.pb 3KB phys_opt_design.pb 2KB top_sd_rw_power_summary_routed.pb 868B clk_wiz_0_utilization_synth.pb 289B top_sd_rw_utilization_placed.pb 289B top_sd_rw_utilization_synth.pb 289B vivado.pb 149B top_sd_rw_timing_summary_routed.pb 109B top_sd_rw_methodology_drc_routed.pb 52B top_sd_rw_route_status.pb 44B top_sd_rw_drc_routed.pb 37B top_sd_rw_drc_opted.pb 37B top_sd_rw_bus_skew_routed.pb 30B top_sd_rw_timing_summary_routed.rpt 435KB top_sd_rw_io_placed.rpt 273KB top_sd_rw_clock_utilization_routed.rpt 24KB top_sd_rw_methodology_drc_routed.rpt 20KB top_sd_rw_utilization_placed.rpt 11KB top_sd_rw_power_routed.rpt 9KB top_sd_rw_utilization_synth.rpt 9KB top_sd_rw_control_sets_placed.rpt 8KB clk_wiz_0_utilization_synth.rpt 8KB top_sd_rw_drc_routed.rpt 2KB top_sd_rw_drc_opted.rpt 2KB top_sd_rw_bus_skew_routed.rpt 985B top_sd_rw_route_status.rpt 588B top_sd_rw_timing_summary_routed.rpx 416KB top_sd_rw_power_routed.rpx 213KB top_sd_rw_methodology_drc_routed.rpx 42KB top_sd_rw_drc_routed.rpx 2KB top_sd_rw_drc_opted.rpx 2KB top_sd_rw_bus_skew_routed.rpx 1KB .vivado.begin.rst 224B .vivado.begin.rst 224B .vivado.begin.rst 224B .route_design.begin.rst 185B .opt_design.begin.rst 185B .write_bitstream.begin.rst 185B .phys_opt_design.begin.rst 185B .place_design.begin.rst 185B .init_design.begin.rst 185B .vivado.end.rst 0B .Vivado_Synthesis.queue.rst 0B .init_design.end.rst 0B .vivado.end.rst 0B .Vivado_Implementation.queue.rst 0B .write_bitstream.end.rst 0B .route_design.end.rst 0B .phys_opt_design.end.rst 0B .opt_design.end.rst 0B .place_design.end.rst 0B .vivado.end.rst 0B .Vivado_Synthesis.queue.rst 0B ISEWrap.sh 2KB ISEWrap.sh 2KB ISEWrap.sh 2KB runme.sh 1KB runme.sh 1KB runme.sh 1KB top_sd_rw.tcl 13KB clk_wiz_0.tcl 12KB top_sd_rw.tcl 6KB
htr.txt 478B共 182 条
- 1
- 2
资源评论
