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© Semiconductor Components Industries, LLC, 2017
July, 2018 − Rev. 0
1 Publication Order Number:
AR0234CS/D
AR0234CS
Advance Information
1/2.6-inch 2.3 Mp CMOS
Digital Image Sensor
with Global Shutter
Description
The AR0234CS is a 1/2.6−inch 2Mp CMOS digital image sensor
with an active−pixel array of 1920 (H) x 1200 (V). It incorporates a
new innovative global shutter pixel design optimized for accurate and
fast capture of moving scenes at full resolution 120 frame per second.
The sensor produces clear, low noise images in both low−light and
bright scenes. It includes sophisticated camera functions such as auto
exposure control, windowing, row skip mode, column−skip mode,
pixel−binning and both video and single frame modes. It is
programmable through a simple two−wire serial interface. The
AR0234CS produces extraordinarily clear, sharp digital pictures with
an industry leading Global Shutter Efficiency, and its ability to capture
both continuous video and single frames makes it the perfect choice
for a wide range of applications, including scanning and industrial
inspection.
Table 1. KEY PERFORMANCE PARAMETERS
Parameter
Typical Value
Optical Format
1/2.6−inch (6.8 mm)
Active Pixels 1920 (H) x 1200 (V) = 2.3 Mp
Pixel Size
3.0 mm
Color Filter Array RGB or Monochrome
Chief Ray Angle 0° or 28°
Shutter Type Global Shutter
Input Clock Range 6–64 MHz
Output Pixel Clock
(Maximum)
90 MHz
Output
Serial
Parallel
MIPI, 1, 2, or 4−lane D−PHY 1.2, CSI−2
10−Bit
Frame Rate
Full resolution
720p
120fps (4− lane MIPI running at 30 fps
per MIPI lane)
30 fps (Parallel)
120 fps (MIPI)
50 fps (Parallel)
Responsivity
Monochrome
Color
56 Ke/lux*s
TBD
SNRMAX 38 dB
Dynamic Range 71.4 dB
Supply Voltage
I/O
Digital
Analog
1.8 or 2.8 V
1.2 V
2.8 V
Power Consumption TBD MIPI mW
Standby Power Consumption TBD
Operating Temperature –40°C to + 85°C (Ambient)
Package Options 9.995 x 5.595 CSP
www.onsemi.com
Features
• Superior Low−light and IR Performance
• HD Video (1080p120)
• 1/2/4−lane MIPI or 10−bit Parallel Data
Interface
• Automatic Black Level Calibration (ABLC)
• On−chip Auto Exposure Control with
Statistics Engine for Any 5x5 Programmable
ROI
• Horizontal and Vertical Mirroring, Window-
ing and Pixel Binning
• On−chip Histogram Auto Exposure Control
for Any Programmable ROI
• 5 x 5 Statistics Engine for Any Program-
mable ROI
• Flexible Control for Row and Column Skip
Mode
• On−chip Slave or Trigger Mode for Syn-
chronization
• Built in Strobe Control
• On−Chip Phase Lock Loop (PLL)
• On−Chip Lens Shading Correction
See detailed ordering and shipping information on page 2 of
this data sheet.
ORDERING INFORMATION
This document contains information on a
product under development. ON Semiconductor
reserves the right to change or discontinue this
product without notice.
This document, and the information contained herein,
is CONFIDENTIAL AND PROPRIETARY and the
property of Semiconductor Components Industries,
LLC., dba ON Semiconductor. It shall not be used,
published, disclosed or disseminated outside of the
Company, in whole or in part, without the written
permission of ON Semiconductor. Reverse
engineering of any or all of the information contained
herein is strictly prohibited.
E 2018, SCILLC. All Rights Reserved.
AR0234CS
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
www.onsemi.com
2
Applications
• Bar Code Scanner
• Gesture Recognition
• 3D Scanning
• Positional Tracking
• Iris Scanning
• Augmented Reality
• Virtual Reality
• Biometrics
• Machine Vision
ORDERING INFORMATION
Table 2. AVAILABLE PART NUMBERS
Part Number
Product Description Orderable Product Attribute Description
AR0234CSSC00SUD20−E RGB, 0 deg CRA Die Sample
AR0234CSSC00SUKA0−CP−E RGB, 0 deg CRA CSP Chip Tray with Protective Film − Sample
AR0234CSSC00SUKA0−CR−E RGB, 0 deg CRA CSP Chip Tray with No Protective Film − Sample
AR0234CSSC28SUD20−E RGB, 28 deg CRA Die Sample
AR0234CSSC28SUKA0−DP−E RGB, 28 deg CRA CSP Chip Tray with Protective Film − Sample
AR0234CSSC28SUKA0−DR−E RGB, 28 deg CRA CSP Chip Tray with No Protective Film − Sample
AR0234CSSM00SUD20−E Mono, 0 deg CRA Die Sample
AR0234CSSM00SUKA0−CP−E Mono, 0 deg CRA CSP Chip Tray with Protective Film − Sample
AR0234CSSM00SUKA0−CR−E Mono, 0 deg CRA CSP Chip Tray with No Protective Film − Sample
AR0234CSSM28SUD20−E Mono, 28 deg CRA Die Sample
AR0234CSSM28SUKA0−DP−E Mono, 28 deg CRA CSP Chip Tray with Protective Film − Sample
AR0234CSSM28SUKA0−DR−E Mono, 28 deg CRA CSP Chip Tray with No Protective Film − Sample
AR0234CSSC00SUKAH3−GEVB RGB 0 deg CRA 2MP 1/3 CIS 0 Deg CSP− RGB HB
AR0234CSSC28SUKAH3−GEVB RGB 28 deg CRA 2MP 1/3 CIS 28 Deg CSP− RGB HB
AR0234CSSM00SUKAH3−GEVB Mono 0 deg CRA 2MP 1/3 CIS 0 Deg CSP− Mono HB
AR0234CSSM28SUKAH3−GEVB Mono 28 deg CRA 2MP 1/3 CIS 28 Deg CSP− Mono HB
GENERAL DESCRIPTION
The ON Semiconductor AR0234CS can be operated in its
default mode or programmed for frame size, exposure, gain,
and other parameters. The default mode output is
a full−resolution image at 120 frames per second (fps). It
outputs 10−bit raw data using parallel output ports or 10−bit
or 8−bit using serial (MIPI) output ports. The device may be
operated in video (master) mode or in frame trigger mode.
FRAME_VALID and LINE_VALID signals are output on
dedicated pins, along with a synchronized pixel clock.
A dedicated FLASH pin can be programmed to control
external LED or flash exposure illumination.
The AR0234CS includes additional features to allow
application−specific tuning: windowing, adjustable
auto−exposure control, auto black level correction,
on−board temperature sensor, row−skip and column−skip
modes and binning modes.
The sensor is designed to operate in a wide ambient
temperature range (–40°C to +85°C).
FUNCTIONAL OVERVIEW
The AR0234CS is a progressive−scan sensor that
generates a stream of pixel data at a constant frame rate. It
uses an on−chip, phase−locked loop (PLL) that can be
optionally enabled to generate all internal clocks from
a single master input clock running between 6 and 64 MHz.
The maximum output pixel rate is 90 Mp/s, corresponding
to a clock rate of 90 MHz. Figure 1 shows a block diagram
of the sensor.
AR0234CS
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
www.onsemi.com
3
Figure 1. Block Diagram
Control Registers
Analog Processing and
A/D Conversion
Active Pixel Sensor
(APS)
Array
Pixel Data Path
(Signal Processing)
Timing and Control
(Sequencer)
Auto Exposure
and Stats Engine
Temperature
Sensor
OTPM Memory PLL
External
Clock
Serial
Output
Parallel
Output
Flash
Trigger
Two−wire
Serial
Interface
Power
XShutdown
User interaction with the sensor is through the two−wire
serial bus, which communicates with the array control,
analog signal chain, and digital signal chain. The core of
the sensor is a 2.3 Mp Active−Pixel Sensor array. The
AR0234CS features global shutter technology for accurate
capture of moving images. The exposure of the entire array
is controlled by programming the integration time by
register setting. All pixels simultaneously integrate light and
store signal at the pixel. Once a row readout sequence has
been initiated, each pixel’s stored signal is then transfered
through the analog signal chain (providing offset and gain)
and then through each column analog to−digital converter
(ADC). The output from the ADC is a 10−bit value for each
pixel in the array. The ADC output passes through a digital
processing signal chain (which provides further data path
corrections and applies digital gain). The pixel data are
output at a rate of up to 90 Mp/s, in parallel to frame and line
synchronization signals.
FEATURES OVERVIEW
The AR0234CS Global Shutter sensor has a wide array of
features to enhance functionality and to increase versatility.
A summary of features follows.
• 3.0 mm Global Shutter Pixel
To improve the low light performance and to capture
the moving images accurately a large (3.0 mm) global
shutter pixel is implemented for better image
optimization.
• Operating Modes
The AR0234CS works in master (video), Slave/ Trigger
(single frame), or Auto Trigger modes. In master mode,
the sensor generates the integration and readout timing.
In Slave/trigger mode, it accepts a trigger from external
host to start exposure, then generates the exposure and
readout timing. The external trigger signal allows for
precise control of frame rate and register change
updates. The exposure time is programmed through the
two−wire serial interface for both modes.
• Window Control
Configurable window size and blanking times allow
a wide range of resolutions and frame rates. Digital
binning and skipping modes are supported, as are
vertical and horizontal mirror operations.
• Frame Rate
AR0234CS is capable of running up to 120 fps at full
(1920 x 1200) resolution and 120 fps at 720p resolution
for MIPI interface.
• Embedded Data and Statistics
The AR0234CS has the capability to output image data
and statistics embedded within the frame timing.
• Multi−Camera Synchronization
The AR0234CS supports advanced line synchronization
controls for multi−camera (stereo) support.
• Context Switching and Register Updates Context
switching may be used to rapidly switch between two
sets of register values.
• Gain
A programmable analog gain of 1x to 16x applied
globally to all color channels is available along with
a digital gain of 1x to 16x that may be configured on
a per color channel basis.
• Automatic Exposure Control
The integrated automatic exposure control may be used
to ensure optimal settings of exposure and gain are
computed and updated every other frame.
• MIPI
The AR0234CS Global Shutter image sensor supports
one, two and four lanes of MIPI data. Compliant to
MIPI standards:
♦ MIPI Alliance Standard for CSI−2 version 1.2
♦ MIPI Alliance Standard for D−PHY version 1.0
• PLL
An on chip PLL provides reference clock flexibility and
AR0234CS
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
www.onsemi.com
4
supports spread spectrum sources for improved EMI
performance.
• Reset
The AR0234CS may be reset by a register write, or by
a dedicated input pin.
• Shutdown Pin
The AR0234CS has a shutdown pin to force the device
to standby mode with very low power consumption.
• Output Enable
The AR0234CS output pins may be tri−stated using
a dedicated output enable pin.
• Temperature Sensor
• Black Level Correction
• Row Noise Correction
• Test Patterns
Several test patterns may be enabled for debug
purposes. These include a solid color, color bar, fade to
gray, and a walking 1s test pattern.
• Silicon/OTPM Revision Information
A revision register is provided to read out (via I
2
C)
silicon and OTPM revision information. This will be
helpful to distinguish material if there are future OTPM
or silicon revisions.
• Lens Shading Correction
A lens shading correction algorithm is included for
potential low Z height applications.
• Compression
AR0234CS can optionally compress 10−bit data to
8−bit using DPCM compression.
AR0234CS
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
www.onsemi.com
5
ACTIVE ARRAY
The AR0234CS active pixel array is configured as 1928
columns by 1208 rows. The first active the pixel is top right
corner of the active pixel array (see Figures 2 and 3 below).
Figure 2. Pixel Mono Pattern Detail
(Top Right Corner)
C
Column Readout Direction
Row Readout Direction
First Active
Pixel (4, 4)
…
…
CCCCC CC
CCCCCCCC
CCCCCCCC
CCCCCCCC
CCCCCCCC
CCCCCCCC
Figure 3. Pixel Color Pattern
Detail (Top Right Corner)
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
Column Readout Direction
Row Readout Direction
First Active
Pixel (4, 4)
…
…
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