The main body of this guide is organised alphabetically. Each section
is indexed by a key term which appears prominently at the top of
each page. Often you can find the information you want by flicking
through the guide looking for the appropriate key term. If that fails,
there is a full index at the back.
Most of the information in this guide is organised around the VHDL
syntax headings, but there are additional special sections on Coding
Standards, Design Flow, Errors, Reserved Words and VHDL 93, and
also listings of the standard packages Standard, TEXTIO,
Std_logic_1164 and Numeric_std.
If you are new to VHDL, you should start by reading A Brief
Introduction to VHDL, which follows overleaf.
The Index
Bold index entries have corresponding pages in the main alphabetical
reference section. The remaining index entries are followed by a list
of appropriate page references in the main alphabetical reference
section, given in order of importance.
Key To Notation Used To Define VHDL Syntax
The syntax definitions are written to look like examples whereever
possible, but it has been necessary to introduce some extra notation.
In brief, square brackets [] enclose optional items, three dots ... means
repetition, and curly brackets {} enclose comments. ItalicNames
represent parts of the syntax defined elsewhere. A full description of
the notation follows:
Curly brackets {} enclose comments that are not part of the VHDL
syntax being defined, but give you further information about the
syntax definition.
Syntax enclosed in square brackets [] is optional (except in the
definition of a signature, where square brackets are part of the VHDL
syntax!)
... means zero or more repetitions of the preceding item or line, or
means a list, as follows:
Item ... means zero or more repetitions of the Item.
, ... means repeat in a comma separated list (e.g. A, B, C).
; ... means repeat in a semicolon separated list.
| ... means repeat in a bar separated list.
4
Using This Guide
