Character/Graphic TFT LCD Controller – Technical Manual
RAiO TECHNOLOGY INC. 4/215 www.raio.com.tw
RA8877
4.2 SERIAL HOST INTERFACE (MULTIPLEX WITH PARALLEL HOST INTERFACE) ...................................18
4.3 SDR SDRAM INTERFACE (39 SIGNALS) ......................................................................................18
4.4 SERIAL FLASH OR SPI MASTER INTERFACE (5 SIGNALS)...............................................................19
4.5 PWM INTERFACE (2 SIGNALS) .....................................................................................................19
4.6 KEYSCAN INTERFACE (9 SIGNALS) ............................................................................................20
4.7 LCD PANEL LVDS INTERFACE/FPD-LINK (12 SIGNALS) ..............................................................20
4.8 CLOCK, RESET & TEST MODE (6 SIGNALS)...................................................................................21
4.9 POWER AND GROUND..................................................................................................................21
5. AC/DC CHARACTERISTICS ......................................................................................................................22
5.1 MAXIMUM ABSOLUTE LIMIT..........................................................................................................22
5.2 DC CHARACTERISTIC ..................................................................................................................22
6. CLOCK & RESET........................................................................................................................................24
6.1 CLOCK ........................................................................................................................................24
6.1.1 CLOCK SCHEME........................................................................................................................24
6.1.2 PLL SETTING............................................................................................................................25
6.2 RESET.........................................................................................................................................25
6.2.1 POWER-ON-RESET...................................................................................................................25
6.2.2 EXTERNAL RESET .....................................................................................................................26
7. HOST INTERFACE......................................................................................................................................27
7.1 INDIRECT INTERFACE ...................................................................................................................27
7.1.1 REGISTER WRITE PROCEDURE .................................................................................................27
7.1.2 REGISTER READ PROCEDURE ...................................................................................................27
7.1.3 MEMORY WRITE PROCEDURE ...................................................................................................27
7.2 PARALLEL HOST .........................................................................................................................28
7.2.1 PARALLEL HOST INTERFACE......................................................................................................28
7.2.2 PARALLEL HOST I/F PROTOCOL .................................................................................................29
7.3 SERIAL HOST ..............................................................................................................................32
7.3.1 3-WIRE SPI INTERFACE ............................................................................................................32
7.3.2 4-WIRE SPI INTERFACE ............................................................................................................35
7.3.3 IIC I/F ......................................................................................................................................37
7.4 DISPLAY INPUT DATA FORMAT.....................................................................................................40
7.4.1 INPUT DATA WITHOUT OPACITY (RGB) ......................................................................................40
7.4.2 INPUT DATA WITH OPACITY ( RGB) .........................................................................................42
评论0
最新资源