Application Report
SLAA131 –September 2001
1
A Low-Cost 12-Bit Speech CODEC Design Using the
MSP430F13x
Kes Tam, Vincent Chan MSP/MSC
ABSTRACT
This application report illustrates a design of a single chip speech codec (ADC and DAC)
using the MSP430F133 MCU from Texas Instruments. The ADC part of this codec uses
the on chip 12-bit ADC. The DAC part uses a novel PWM technique which enables the
DAC to operate at a high over-sampling frequency with high resolution. This simplifies the
subsequent filter circuitry. Combined with on chip voice compression algorithms, this
solution forms a cost effective and ultra-low-power base band circuit for voice
communication applications.
Contents
1 Introduction......................................................................................................................................................2
2 System Overview .............................................................................................................................................3
3 Filters response ...............................................................................................................................................4
3.1 Moving Average and Comb Filter .............................................................................................................4
3.2 Forth-Order LPF........................................................................................................................................5
3.3 Combined Response.................................................................................................................................7
4 Oversampling...................................................................................................................................................9
5 Dual PWM .........................................................................................................................................................9
6 Summary.........................................................................................................................................................10
References ..............................................................................................................................................................11
Appendix A. Schematic..........................................................................................................................................12
Appendix B. Software Listing ...............................................................................................................................13
Figures
Figure 1. System Block Block Diagram ................................................................................................................3
Figure 2. Moving Average or Comb Filter Gain Response .................................................................................5
Figure 3. A Second Order Low-Pass Filter ...........................................................................................................6
Figure 4. Output Analog LPF Gain Response......................................................................................................7
Figure 5. Ouput Section Gain Response ..............................................................................................................8
Figure 6. Overall System Gain Response.............................................................................................................8
Figure 7. Combing Two PWM Outputs................................................................................................................10
剩余27页未读，继续阅读
资源评论
