Zynq UltraScale+ MPSoC: Embedded Design Tutorial 5
UG1209 (v2018.1) June 05, 2018 www.xilinx.com
Chapter 1
Introduction
About This Guide
This document provides an introduction to using the Xilinx® Vivado® Design Suite flow for
using the Zynq® UltraScale+™ MPSoC device. The examples are targeted for the Xilinx
ZCU102 Rev1 evaluation board. The tool versions used are Vivado and the Xilinx Software
Development Kit (SDK) 2018.1.
Note:
To install SDK as part of the Vivado Design Suite, you must choose to include SDK in the
installer. See Xilinx Software Development Kit, page 8.
The examples in this document were created using the Xilinx tools running on Windows 7,
64-bit operating system, and PetaLinux on Linux 64-bit operating system. Other versions of
the tools running on other Window installs might provide varied results. These examples
focus on introducing you to the following aspects of embedded design.
Note:
The sequence mentioned in the tutorial steps for booting Linux on the hardware is specific to
the PetaLinux tools released for 2018.1, which must be installed on the Linux host machine for
exercising the Linux portions of this document.
• Chapter 2, Zynq UltraScale+ MPSoC Processing System Configuration describes
creation of a system with the Zynq UltraScale+ MPSoC Processing System (PS) and
running a simple “Hello World” application on Arm® Cortex®-A53 and Cortex-R5
processors. This chapter is an introduction to the hardware and software tools using a
simple design as the example.
• Chapter 3, Build Software for PS Subsystems describes steps to configure and build
software for processing blocks in processing system, including application processing
unit (APU), real-time processing unit (RPU), and platform management unit (PMU).
• Chapter 4, Debugging with SDK provides an introduction to debugging software using
the debug features of the Xilinx Software Development Kit (SDK). This chapter uses the
previous design and runs the software bare metal (without an OS) to show how to
debug. This chapter also lists Debug configurations for Zynq UltraScale+ MPSoC.
• Chapter 5, Boot and Configuration shows integration of components to configure and
create Boot images for a Zynq UltraScale+ system. The purpose of this chapter is to
understand how to integrate and load Boot loaders.
