STM32安富莱开发板基础例程（基于固件库V3.4.0）

; generated by ARM C/C++ Compiler with , RVCT4.0 [Build 524] for uVision ; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\Obj\stm32f10x_tim.o --depend=.\Obj\stm32f10x_tim.d --device=DARMSTM --apcs=interwork -O0 --diag_suppress=870 -I..\ -I..\..\..\..\Libraries\CMSIS\CM3\CoreSupport -I..\..\..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I..\..\..\..\Utilities\STM32_EVAL -I..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL -I..\..\..\..\Utilities\STM32_EVAL\Common -Id:\Keil\ARM\INC\ST\STM32F10x -D__MICROLIB -DSTM32F10X_HD -DUSE_STDPERIPH_DRIVER -DVECT_TAB_SRAM -DUSE_STM3210E_EVAL ..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c] THUMB AREA ||i.TI1_Config||, CODE, READONLY, ALIGN=2 TI1_Config PROC ;;;2698 */ ;;;2699 static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, 000000 b5f0 PUSH {r4-r7,lr} ;;;2700 uint16_t TIM_ICFilter) ;;;2701 { ;;;2702 uint16_t tmpccmr1 = 0, tmpccer = 0; 000002 2400 MOVS r4,#0 000004 2500 MOVS r5,#0 ;;;2703 /* Disable the Channel 1: Reset the CC1E Bit */ ;;;2704 TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E); 000006 8c06 LDRH r6,[r0,#0x20] 000008 f64f77fe MOV r7,#0xfffe 00000c 403e ANDS r6,r6,r7 00000e 8406 STRH r6,[r0,#0x20] ;;;2705 tmpccmr1 = TIMx->CCMR1; 000010 8b04 LDRH r4,[r0,#0x18] ;;;2706 tmpccer = TIMx->CCER; 000012 8c05 LDRH r5,[r0,#0x20] ;;;2707 /* Select the Input and set the filter */ ;;;2708 tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC1F))); 000014 f64f760c MOV r6,#0xff0c 000018 4034 ANDS r4,r4,r6 ;;;2709 tmpccmr1 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); 00001a 051e LSLS r6,r3,#20 00001c ea424616 ORR r6,r2,r6,LSR #16 000020 4334 ORRS r4,r4,r6 ;;;2710 ;;;2711 if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || 000022 4e11 LDR r6,|L1.104| 000024 42b0 CMP r0,r6 000026 d00e BEQ |L1.70| 000028 4e10 LDR r6,|L1.108| 00002a 42b0 CMP r0,r6 00002c d00b BEQ |L1.70| 00002e f1b04f80 CMP r0,#0x40000000 000032 d008 BEQ |L1.70| 000034 4e0e LDR r6,|L1.112| 000036 42b0 CMP r0,r6 000038 d005 BEQ |L1.70| ;;;2712 (TIMx == TIM4) ||(TIMx == TIM5)) 00003a 4e0e LDR r6,|L1.116| 00003c 42b0 CMP r0,r6 00003e d002 BEQ |L1.70| 000040 4e0d LDR r6,|L1.120| 000042 42b0 CMP r0,r6 000044 d106 BNE |L1.84| |L1.70| ;;;2713 { ;;;2714 /* Select the Polarity and set the CC1E Bit */ ;;;2715 tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P)); 000046 f64f76fd MOV r6,#0xfffd 00004a 4035 ANDS r5,r5,r6 ;;;2716 tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); 00004c f0410601 ORR r6,r1,#1 000050 4335 ORRS r5,r5,r6 000052 e005 B |L1.96| |L1.84| ;;;2717 } ;;;2718 else ;;;2719 { ;;;2720 /* Select the Polarity and set the CC1E Bit */ ;;;2721 tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP)); 000054 f64f76f5 MOV r6,#0xfff5 000058 4035 ANDS r5,r5,r6 ;;;2722 tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); 00005a f0410601 ORR r6,r1,#1 00005e 4335 ORRS r5,r5,r6 |L1.96| ;;;2723 } ;;;2724 ;;;2725 /* Write to TIMx CCMR1 and CCER registers */ ;;;2726 TIMx->CCMR1 = tmpccmr1; 000060 8304 STRH r4,[r0,#0x18] ;;;2727 TIMx->CCER = tmpccer; 000062 8405 STRH r5,[r0,#0x20] ;;;2728 } 000064 bdf0 POP {r4-r7,pc} ;;;2729 ENDP 000066 0000 DCW 0x0000 |L1.104| DCD 0x40012c00 |L1.108| DCD 0x40013400 |L1.112| DCD 0x40000400 |L1.116| DCD 0x40000800 |L1.120| DCD 0x40000c00 AREA ||i.TI2_Config||, CODE, READONLY, ALIGN=2 TI2_Config PROC ;;;2745 */ ;;;2746 static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, 000000 b5f0 PUSH {r4-r7,lr} ;;;2747 uint16_t TIM_ICFilter) ;;;2748 { ;;;2749 uint16_t tmpccmr1 = 0, tmpccer = 0, tmp = 0; 000002 2400 MOVS r4,#0 000004 2500 MOVS r5,#0 000006 2600 MOVS r6,#0 ;;;2750 /* Disable the Channel 2: Reset the CC2E Bit */ ;;;2751 TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC2E); 000008 8c07 LDRH r7,[r0,#0x20] 00000a f64f7cef MOV r12,#0xffef 00000e ea07070c AND r7,r7,r12 000012 8407 STRH r7,[r0,#0x20] ;;;2752 tmpccmr1 = TIMx->CCMR1; 000014 8b04 LDRH r4,[r0,#0x18] ;;;2753 tmpccer = TIMx->CCER; 000016 8c05 LDRH r5,[r0,#0x20] ;;;2754 tmp = (uint16_t)(TIM_ICPolarity << 4); 000018 050f LSLS r7,r1,#20 00001a 0c3e LSRS r6,r7,#16 ;;;2755 /* Select the Input and set the filter */ ;;;2756 tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC2S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC2F))); 00001c f64047ff MOV r7,#0xcff 000020 403c ANDS r4,r4,r7 ;;;2757 tmpccmr1 |= (uint16_t)(TIM_ICFilter << 12); 000022 071f LSLS r7,r3,#28 000024 ea444417 ORR r4,r4,r7,LSR #16 ;;;2758 tmpccmr1 |= (uint16_t)(TIM_ICSelection << 8); 000028 0617 LSLS r7,r2,#24 00002a ea444417 ORR r4,r4,r7,LSR #16 ;;;2759 ;;;2760 if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || 00002e 4f11 LDR r7,|L2.116| 000030 42b8 CMP r0,r7 000032 d00e BEQ |L2.82| 000034 4f10 LDR r7,|L2.120| 000036 42b8 CMP r0,r7 000038 d00b BEQ |L2.82| 00003a f1b04f80 CMP r0,#0x40000000 00003e d008 BEQ |L2.82| 000040 4f0e LDR r7,|L2.124| 000042 42b8 CMP r0,r7 000044 d005 BEQ |L2.82| ;;;2761 (TIMx == TIM4) ||(TIMx == TIM5)) 000046 4f0e LDR r7,|L2.128| 000048 42b8 CMP r0,r7 00004a d002 BEQ |L2.82| 00004c 4f0d LDR r7,|L2.132| 00004e 42b8 CMP r0,r7 000050 d106 BNE |L2.96| |L2.82| ;;;2762 { ;;;2763 /* Select the Polarity and set the CC2E Bit */ ;;;2764 tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P)); 000052 f64f77df MOV r7,#0xffdf 000056 403d ANDS r5,r5,r7 ;;;2765 tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC2E); 000058 f0460710 ORR r7,r6,#0x10 00005c 433d