Abstract—This paper describes the architecture and the IC
implementation of a direct digital frequency synthesizer (DDFS)
that is based on an angle rotation algorithm (similar to CORDIC).
It is shown that the architecture can be implemented as a
multiplierless, feedforward, and easily pipelineable datapath. A
prototype IC has been designed, fabricated in 1.0-m CMOS,
and tested. The IC produces 16-b sine and cosine outputs with
a spurious-free dynamic range of more than 100 dBc. A 36-b
frequency control word gives a tuning resolution of 0.0015 Hz at
a 100-MHz sampling rate.
