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【IC+/ICPLUS/九旸电子】IP108ALLF芯片数据手册
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【IC+/ICPLUS/九旸电子】IP108ALLF芯片数据手册
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IP108AL LF
Datasheet
1/48
Dec 31.2015
Copyright © 2015, IC Plus Corp. IP108A-DS-R04
Octal 10/100 Fast Ethernet Transceiver
Features
z Integrates eight-port 10Base-T, 100Base-TX
and 100Base-FX transceivers in a single chip
z Flexible 8-port 100Base-FX configuration.
z Fully compliant with IEEE802.3/802.3u.
z Supports auto crossover function and force
MDIX function.
z Supports auto-negotiation function.
z Flexible functional configuration through
either pin setting or register programming
z Supports SS-SMII interfaces
z Supports BaseLine Wander (BLW)
compensation
z Provides direct drive mode and serial data
latch LED display mode
z Embeds DSP-based PHY Transceiver
technology to improve the cable driving
performance
z Adjustable current driving capabilities
z Adjustable SS-SMII interface timing
z Provides power-on LED diagnostic function
z Power supply: Selectable 3.3V/1.95V for I/O
1.95V power supply for core
z Supports Automatic Power Saving (APS)
Mode
z Requires only one external clock source
z 0.18u CMOS technology
z 128 pin LQFP EPAD package
z Support Lead Free package (Please refer to
the Order Information)
General description
The IP108A is a highly integrated octal PHY
transceiver for 10Base-T, 100Base-TX and
100Base-FX Fast Ethernet applications. This
device is implemented with advanced 0.18um
CMOS process technology for low power
consumption. For the high port count switch
design such as 16 or 24 or 32-port, the IP108A
can simplify the system design and ensure the
targeted performance.
IP108A can be programmed to operate in various
modes through either hardware (hardware
strapping pin) or software control (registers
setting via SMI). It also supports SS-SMII
interface to MAC controller to reduce the pin-
count.
The IP108A contains eight independent 10/100M
PHY Transceiver and includes encoder, decoder,
line driver, ADC, DAC, DSP and PLL circuits for
each port. The IP108A enters the Automatic
Power Saving Mode to lower the power
consumption once the link partner is disconnected.
The IP108A just needs an external OSC or crystal
as the clock source, simplifying the system design.
Besides the features described above, the driving
capability of IP108A can be trimmed to minimize
the EMI effect by the advanced slew rate control
technology.
IP108AL LF
Datasheet
2/48
Dec 31.2015
Copyright © 2015, IC Plus Corp. IP108A-DS-R04
The major differences between IP108A and IP108
Unlike IP108, which supports limit combination of FX port, each port of IP108A can be configured as a
TP or FX port individually. RMII is not supported in IP108A, the original RMII pins are used as LED pins.
To solve the direct mode LED problem that it needs extra TTL device to drive an active high LED when
VDDIO is 1.95v, IP108A supports direct mode LED that are all active low. To achieve this target, the input
setting functions on these pins are moved to non-LED pins. The differences are listed in the following
table.
IP108A / Setting function
Pin No.
IPH/
IPL
IP108 /
Setting function
Serial LED Direct LED
48
↓
REFCLK TMOD2 TMOD2
51
↑
10_PSAVE_EN PS_MODE_SEL --
52
↓
DRIVE[0] RX_DRIVE[0] RX_DRIVE[0]
53
↑
INTERFACE[0] SS-SMII --
59
↓
DIS_BLINK DIS_BLINK --
60
↓
DRIVE[1] RX_DRIVE[1] RX_DRIVE[1]
61
↓
INTERFACE[1] SSCLK_EN --
65
↑
LED_BLK_TIME LED_BLK_TIME --
66
↓
RX_CLK_INV RX_CLK_INV
67
↑
TP_PAUSE TP_PAUSE --
73
↓
PHY_ADDR[4] PHY_ADDR[4] --
74
↓
LED2_COLBLK_EN IP108A_MODE
81
↑
REPEAT_MODE REPEAT_MODE PHY_ADDR[4]
83
↑
PHY_ADDR[3] PHY_ADDR[3] --
84
↓
RX_DELAY RX_DELAY
85
↑
FX_PAUSE FX_PAUSE --
92
↓
APS_DIS FMOD_LED PHY_ADDR[3]
93
↑
FX_DUPLEX FX_DUPLEX --
97
↓
CLK_INV -- --
98
↓
RDRIVE[2] TX_DELAY TX_DELAY
99
↓
SEL_TXFX[1] -- --
105
↓
MLT3_DET_EN MLT3_DET_DIS --
107
↓
SEL_TXFX[0] -- --
↓: internal pull low
↑: internal pull high
IP108AL LF
Datasheet
3/48
Dec 31.2015
Copyright © 2015, IC Plus Corp. IP108A-DS-R04
FEATURES.................................................................................................................................................. 1
GENERAL DESCRIPTION ......................................................................................................................... 1
THE MAJOR DIFFERENCES BETWEEN IP108A AND IP108.................................................................. 2
REVISION HISTORY................................................................................................................................... 5
BLOCK DIAGRAM...................................................................................................................................... 6
PIN DIAGRAM ............................................................................................................................................ 7
1. PIN DESCRIPTION.......................................................................................................................... 8
2. REGISTERS DESCRIPTION ......................................................................................................... 17
MODE .....................................................................................................................................................................18
REGISTER0 : CONTROL REGISTER ...........................................................................................................................18
REGISTER1 : STATUS REGISTER...............................................................................................................................19
REGISTER2: PHY IDENTIFIER 1 REGISTER ..............................................................................................................20
REGISTER3 : PHY IDENTIFIER 2 REGISTER...........................................................................................................20
REGISTER4 : AUTO-NEGOTIATION ADVERTISEMENT REGISTER............................................................................20
REGISTER5 : AUTO-NEGOTIATION LINK PARTNER ABILITY REGISTER ....................................................................21
REGISTER6 : AUTO-NEGOTIATION EXPANSION REGISTER .......................................................................................22
REGISTER16 : PHY SPECIFICATION CONTROL REGISTER 1 (DEFAULT = 16’H118C)..............................................23
REGISTER18 : PHY STATUS MONITORING REGISTER............................................................................................25
REGISTER20 : PHY SPECIFICATION CONTROL REGISTER 2 (DEFAULT = 16’H700X) ................................................26
REGISTER23 : MDI/MDIX CONTROL REGISTER (DEFAULT = 16’HFF00) ..............................................................27
3. FUNCTIONAL DESCRIPTION....................................................................................................... 28
3.1 BASIC FUNCTION ........................................................................................................................................28
3.1.1 Auto negotiation.................................................................................................................................28
3.1.2 4B/5B encoder....................................................................................................................................28
3.1.3 5B/4B decoder....................................................................................................................................28
3.1.4 Scrambler/ de-scrambler....................................................................................................................28
3.1.5 Serial to Parallel/ Parallel to Serial ..................................................................................................28
3.1.6 Jabber ................................................................................................................................................28
3.1.7 Loop back..................................................................................................................................................28
3.1.8 Far End Fault Indication ...................................................................................................................29
3.1.9 Auto MDI/MDIX ................................................................................................................................29
3.1.10 Auto Power Saving (APS) and Power Down mode............................................................................29
3.2 I/O INTERFACE................................................................................................................................................30
3.2.1 SS-SMII Interface (Source Synchronous SMII) ..................................................................................30
SS-SMII APPLICATION BLOCK DIAGRAM.................................................................................................................30
3.2.2 SMI (Serial Management interface)...................................................................................................31
3.2.3 Guideline for the connection to a transformer...................................................................................32
3.2.4 Guideline for the connection to a fiber MAU.....................................................................................33 U
3.3 PIN SETTING FOR LED MODE AND DRIVING CAPABILITY ................................................................................34
3.3.1 LED Mode Setting..............................................................................................................................34
3.3.2 LED blinking setting time...................................................................................................................34
3.3.3 Serial stream sequence.......................................................................................................................34
3.3.4 Bi-color Configuration.......................................................................................................................36
3.4 I/O CHARACTERISTICS ADJUSTMENT ..........................................................................................................37
3.4.1 SS-SMII I/O driving capability adjustment. .......................................................................................37
3.4.2 LED pin driving capability adjustment ..............................................................................................37
3.4.3 MDIO pin driving capability adjustment ...........................................................................................37
4. OPERATIONAL DESCRIPTION.................................................................................................... 38
IP108AL LF
Datasheet
4/48
Dec 31.2015
Copyright © 2015, IC Plus Corp. IP108A-DS-R04
4.1
RESETTING THE IP108A..........................................................................................................................38
4.2 TRANSMIT FUNCTION AND RECEIVE FUNCTION..........................................................................................38
4.2.1 100BASE-TX MODE ...............................................................................................................................38
4.2.2 100BASE-FX MODE................................................................................................................................38
4.2.3 10BASE-T MODE ....................................................................................................................................38
5. LAYOUT GUIDELINE..................................................................................................................... 39
5.1 GENERAL LAYOUT GUIDELINE..........................................................................................................................39
5.2 TWISTED PAIR LAYOUT GUIDELINE....................................................................................................................39
5.3 SS-SMI LAYOUT GUIDELINE .............................................................................................................................40
5.4 POWER FILTER RECOMMENDATION....................................................................................................................40
5.5 MDC AND MDIO RECOMMENDATION...............................................................................................................40
6. ELECTRICAL CHARACTERISTICS ............................................................................................. 41
6.1 ABSOLUTE MAXIMUM RATIN G ..........................................................................................................................41
6.2 AC CHARACTERISTICS......................................................................................................................................42
Power On Sequence and Reset Timing...............................................................................................................42
6.3 DC CHARACTERISTICS......................................................................................................................................46
7. ORDER INFORMATION................................................................................................................. 47
8. PACKAGE DETAIL ........................................................................................................................ 47
IP108AL LF
Datasheet
5/48
Dec 31.2015
Copyright © 2015, IC Plus Corp. IP108A-DS-R04
Revision History
Revision # Change Description
IP108A-DS-R01 First Release
IP108A-DS_R02 1. Update 6.3 DC Characteristics (page44)
2. Remove SMII function description (page1,5,8,9,17,22,27,36,37,41)
3. Add SS-SMII application block diagram (page29)
4. Modify Fiber Optical application circuit resistor value (page32)
IP108A-DS_R03 1. Add power on sequence.(page 42)
2. Modify Fiber Rx common mode Voltage from AVDD*0.78 to AVDD*0.6.(page 46)
3. Add IC junction temperature description.(page 41)
4. Modify VDDIO , VDDC , AVDD supply voltage minimum value to 1.85V (Page 46)
5. Add DC Characteristics RESET Threshold and X1 Input Low/High Voltage
description (Page 46)
6. Modify MDC maximum operation frequency from 25MHz to 2.5MHz for typing
error (Page 14)
7. Expand VDDC,AVDD supply voltage maxima value from 2.05V to 2.1V (Page46)
IP108A-DS_R04 1. Package changed to LQFP EPAD(page1,47)
剩余47页未读,继续阅读
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