SDR SDRAM Controller VHDL Reference Design version 1.1.
This readme files describes the contents of each directory of the SDR SDRAM Controller reference design version 1.1.
File/Directory Description
=============================================================================
\doc SDR SDRAM reference design documentation
\model Contains the vhdl SDRAM model
\route Contains the Quartus 2000.05 project files a routed controller design
\simulation Contains the vhdl testbench, modelsim project file, and library
\source Contains the vhdl source files for the SDR SDRAM reference design
\synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design
SDRAM FPGA IP CORE
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2015-08-01
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收藏 3.14MB RAR 举报
Altera_SDRAM_controller_IP_CORE.rar （84个子文件） 
Altera_SDRAM_controller_IP_CORE 
sdr_sdram.pdf 630KB
verilog.rar 759KB vhdl route 
sdr_sdram.esf 471B sdr_sdram.csf 3KB sdr_sdram.vqm 155KB pll1.vhd 5KB model stdlogar.vhd 67KB
mt48lc8m16a2.zip 22KB mt48lc8m16a2.vhd 61KB util1164.vhd 3KB mti_pkg.vhd 4KB io_utils.vhd 8KB synthesis synplicity sdr_sdram.vqm 155KB sdr_sdram.prj 1KB
readme.txt 264B doc sdr_sdram.pdf 630KB readme.txt 741B simulation stdlogar.vhd 67KB lpm_pack.vhd 22KB APEX20KE_MF.VHD 42KB work altlvds_rx behavior.dat 3KB behavior.psm 15KB _primary.dat 563B altlvds_tx behavior.dat 2KB behavior.psm 10KB _primary.dat 598B command rtl.psm 31KB rtl.dat 5KB _primary.dat 1KB util_1164 body.dat 2KB _vhdl.psm 128B body.psm 10KB _primary.dat 418B std_logic_arith body.dat 30KB _vhdl.psm 1KB body.psm 179KB _primary.dat 5KB altclklock behavior.dat 2KB behavior.psm 13KB _primary.dat 799B altcam behave.dat 8KB _primary.dat 6KB behave.psm 68KB mti_pkg body.dat 2KB _vhdl.psm 128B body.psm 8KB _primary.dat 321B io_utils body.dat 4KB _vhdl.psm 320B body.psm 16KB _primary.dat 746B sdr_sdram_tb rtl.psm 63KB rtl.dat 11KB _primary.dat 418B pll1 syn.psm 2KB syn.dat 783B _primary.dat 182B _info 6KB sdr_data_path rtl.psm 4KB rtl.dat 514B _primary.dat 518B control_interface rtl.psm 14KB rtl.dat 2KB _primary.dat 778B mt48lc8m16a2 behave.dat 22KB _primary.dat 1KB behave.psm 110KB sdr_sdram rtl.psm 17KB rtl.dat 4KB _primary.dat 938B modelsim.ini 8KB mt48lc8m16a2.vhd 61KB sdr_sdram_tb.vhd 29KB util1164.vhd 3KB mti_pkg.vhd 4KB io_utils.vhd 8KB readme.txt 662B source Command.vhd 16KB sdr_sdram.vhd 15KB sdr_data_path.vhd 2KB control_interface.vhd 9KB pll1.vhd 5KB 使用说明请参看右侧注释====〉〉.txt 774B vhdl.rar 936KB
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