SiT9102LVPECL/HCSL/LVDS/CML差分高速时钟_lvpecl转lvds标准电路资源-CSDN文库

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于传统石英、SAW和泛音谐振技术的传统差分振荡器在稳定度和可靠度上先天不足，SiT9121系列差分振荡器采用SiTime模拟CMOS和全硅MEMS技术研发，是唯一完美结合了超高性能和可编程功能的产品，其频率稳定度达10PPM、相位抖动低于0.6ps（femtosecond），市面上目前仅SiTime实现了这两项的完美结合。 SiT9121支持1-220Mhz之间任意频率，可精确到小数点后六位，确保发挥系统的最高性能。SiT9121同时输出支持 LVDS/LVPECL，经过50000G抗冲击及70G抗振测试，MTBF（平均无故障时间）达10亿小时。SiT9121和SiT9122系列差分振荡器定位于高性能电信、存储和网络应用，如核心和边缘路由器，SATA、SAS、光纤通道主机总线适配器，云存储、服务器、无线基站和10G 以太网**机等。此外，每款产品都支持业界标准管脚配置，不需修改设计或布板方式即可替换现有石英差分振荡器。 SiT9121差分振荡器具备下述功能及优点： . 仅500飞秒RMS相位抖动（12kHZ至20MHz），满足SONET等应用的苛刻要求 . 总频率稳定度达±10、±25及±50PPM，系统正时余量(timing margin)更佳 . 频率范围极广：SiT9121频率范围1至220MHz，SiT9122频率范围220至650MHz . 可编程频率精度达小数点后六位，确保发挥系统最高性能 . LVPECL及LVDS信号电平可调 . 通过50000G抗冲击及70G抗振测试，MTBF（平均无故障时间）达10亿小时，高稳定度应用首选 . 工作电压2.5V、3.3V均可 . 支持工业（-40至+85°C）及长时间商业（-20至+70°C）工作温度范围 . 业界标准针脚规格3.2×2.5mm，5.0×3.2mm，7.0×5.0mm封装 . 样品24小时内发货，生产前置时间仅2至4周 . FPGA产品首选高性能差分时钟振荡器 . 兼容工业标准封装: 3.2×2.5, 5.0×3.2 and 7.0×5.0 mmxmm . 超强抗震动、抗冲击能力，优异的温漂性能 . 如需220MHz以上频点的高性能差分晶振，推荐选择SiT9122系列

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SiTime Corporation 990 Almanor Avenue Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com

Rev. 1.52 Revised June 23, 2010

SiT9102

LVPECL / HCSL / LVDS / CML

1 to 220 MHz High Performance Oscillator

Features

• Extremely low RMS phase jitter (random)

• <1 ps (typical)

• Wide frequency range

• 1 MHz to 220 MHz

• 220 MHz to 800 MHz refer to SiT9107

• High frequency stability

• ±10 PPM, ±15 PPM, ±20 PPM

• ±25 PPM, ±50 PPM

• Operating voltage

• 1.8, 2.5 or 3.3 V

• Other voltages up to 3.63 V (contact SiTime)

• Operating temperature range

• Industrial, -40 to 85 °C

• Extended Commercial, -20 to 70 °C

• Commercial, 0 to 70 °C

• Small footprint

• 5.0 x 3.2 x 0.75 mm

• 7.0 x 5.0 x 0.90 mm

• Pb-free and RoHS compliant

• For Spread Spectrum see SiT9002

• Ultra-reliable start up and greater immunity from inter

ference

Benefits

• Ultra fast lead time: 2 to 3 weeks

• No crystal or capacitors required

• Eliminates crystal qualification time

• 50% + board saving space

• More cost effective than quartz oscillators, quartz crystals

and clock ICs.

• Completely quartz-free

Applications

• Server

• Router

•RAID controller

• Gigabit Ethernet

• 10 Gigabit Ethernet

• Fiber Channel

•SATA / SAS

• PCI-Express

• Fully Buffered DIMM

• System clock

• Networking and computing

Block Diagram

Pinout

1 6

VDD

OUT-

OUT+

GND

ST/OE

High Performance

Phase Lock Loop

MEMS

Resonator

ST/OE GND

VDD

OUT- OUT+

Rev. 1.52 Page 2 of 13 www.sitime.com

SiT9102

LVPECL / HCSL / LVDS / CML

1 to 220 MHz High Performance Oscillator

Absolute Maximum Ratings

Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual

performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.

Pin Description

Pin No. Name Pin Description

1ST

/OE Input Standby or Output Enable pin for OUT+ and OUT-.

OE:

When High or Open : OUT+ and OUT- = active

When Low : OUT+ and OUT- = High Impedance state

ST:

When High or Open : OUT+ and OUT- = active

When Low : OUT+ and OUT- = Output is low (weak pull down), oscillation stops

2 NC NA Do Not connect pin, leave it floating.

3 GND Power VDD power supply ground. Connect to Ground

4 OUT+ Output 1 to 220 MHz programmable clock output .

5 OUT- Output

6 VDD Power Power supply

Absolute Maximum Table

Parameter Min. Max. Unit

Storage Temperature -65 150 °C

VDD -0.5 4 V

Vin GND - 0.5 VDD + 0.5 V

Theta JA ( with copper plane on VDD and GND) 5.0 x 3.2 package

7.0 x 5.0 package when center pad is soldered down

7.0 x 5.0 package when center pad is not soldered down

–68°C/W

–38°C/W

–90°C/W

Theta JC (with PCB traces of 0.010 inch to all pins) 5.0 x 3.2 package

7.0 x 5.0 package when center pad is soldered down

7.0 x 5.0 package when center pad is not soldered down

–45°C/W

–35°C/W

–48°C/W

Soldering Temperature (follow standard Pb free soldering guidelines) – 260 °C

Number of Program Writes – 1 NA

Program Retention over -40 to 125C, Process, VDD (0 to 3.6V) – 1,000+ years

Human Body Model (JESD22-A114) 2000 – –

Charged Device Model (JESD22-C101) 750 – –

Machine Model (JESD22-A115) 200 – –

Environmental Compliance

Parameter Condition/Test Method

Mechanical Shock MIL-STD-883F, Method 2002

Mechanical Vibration MIL-STD-883F, Method 2007

Temperature Cycle MIL-STD-883F, Method 1010-65-150°C (1000 cycle)

Solderability MIL-STD-883F, Method 2003

Moisture Sensitivity Level MSL1 @ 260°C

Rev. 1.52 Page 3 of 13 www.sitime.com

SiT9102

LVPECL / HCSL / LVDS / CML

1 to 220 MHz High Performance Oscillator

DC Electrical Specifications

LVCMOS input, OE or ST pin, 3.3V ±10% or 2.5V ±10% or 1.8V ±5%, -40 to 85°C

Symbol Parameter Condition Min. Typ. Max. Unit

Input High Voltage 70 – – %Vdd

Input Low Voltage – – 30 %Vdd

Input High Current OE or ST pin – – 10 µA

Input Low Current OE or ST pin -10 – – µA

Power Up Time Time from minimum power supply voltage to the

first cycle (Guaranteed no runt pulses)

––10ms

LVPECL, 3.3V ±10% or 2.5V ±10%, -40 to 85°C

Symbol Parameter Condition Min. Typ. Max. Unit

Supply Voltage 2.97 3.3 3.63 V

2.25 2.5 2.75 V

Supply Current V

= 3.3, Excluding Load Termination Current – 68 74 mA

= 2.5, Excluding Load Termination Current – 65 71 mA

Output High Voltage 50 Ohm termination to V

- 2.0V

See Figure 2, 3.

-1.1 – V

-0.7 V

Output Low Voltage V

-2.0 – V

-1.4 V

swing

Pk-Pk Output Voltage Swing 600 800 1000 mV

HCSL, 3.3V ±10% or 2.5V ±10%, -40 to 85°C

Symbol Parameter Condition Min. Typ. Max. Unit

Supply Voltage 2.97 3.3 3.63 V

2.25 2.5 2.75 V

Supply Current V

= 3.3, Excluding Load Termination Current – 65 70 mA

= 2.5, Excluding Load Termination Current – 62 67 mA

Output High Voltage 50 Ohm termination to GND

See Figure 4.

600 – 950 mV

Output Low Voltage 0.0 – 50 mV

swing

Pk-Pk Output Voltage Swing 600 – 950 mV

LVDS, 3.3V ±10% or 2.5V ±10%, -40 to 85°C

Symbol Parameter Condition Min. Typ. Max. Unit

Supply Voltage 2.97 3.3 3.63 V

2.25 2.5 2.75 V

Supply Current V

= 3.3, Excluding Load Termination Current – 73 79 mA

= 2.5, Excluding Load Termination Current – 70 76 mA

OD1

Differential Output Voltage Swing Mode = Normal

Single load termination.

See Figure 5.

250 350 450 mV

ΔV

OD1

Magnitude Change – – 50 mV

OS1

Offset Voltage – 1.2 – V

ΔV

OS1

Magnitude Change – – 50 mV

OD2

Differential Output Voltage Swing Mode = High

Single load termination.

See Figure 5.

500 700 900 mV

ΔV

OD2

Magnitude Change – – 50 mV

OS2

Offset Voltage – 1.2 – V

ΔV

OS2

Magnitude Change – – 50 mV

OD3

Differential Output Voltage Swing Mode = High

Double load termination.

See Figure 6.

250 350 450 mV

ΔV

OD3

Magnitude Change – – 50 mV

OS3

Offset Voltage – 1.2 – V

ΔV

OS3

Magnitude Change – – 50 mV

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2023-07-27

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2023-07-27

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2023-07-27

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2023-07-27

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