Net: A0
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a0
Net: A1
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a1
Net: A10
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a10
Net: A11
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a11
Net: A12
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a12
Net: A13
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a13
Net: A14
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a14
Net: A15
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a15
Net: A16
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a16
Net: A17
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a17
Net: A18
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a18
Net: A19
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a19
Net: A2
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a2
Net: A20
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a20
Net: A21
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a21
Net: A22
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a22
Net: A23
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a23
Net: A3
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a3
Net: A4
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a4
Net: A5
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a5
Net: A6
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a6
Net: A7
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a7
Net: A8
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a8
Net: A9
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):a9
Net: AEN
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):aen
Net: AGND
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):agnd
Net: BA0
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):ba0
Net: BA1
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):ba1
Net: BA2
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):ba2
Net: BA3
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):ba3
Net: BA4
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):ba4
Net: BA5
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):ba5
Net: BA6
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):ba6
Net: BA7
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):ba7
Net: BD0
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd0
Net: BD1
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd1
Net: BD10
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd10
Net: BD11
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd11
Net: BD12
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd12
Net: BD13
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd13
Net: BD14
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd14
Net: BD15
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd15
Net: BD2
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd2
Net: BD3
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd3
Net: BD4
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd4
Net: BD5
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd5
Net: BD6
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd6
Net: BD7
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd7
Net: BD8
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd8
Net: BD9
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bd9
Net: BNC2
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bnc2
Net: BNC3
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bnc3
Net: BRD
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):brd
Net: BRESET
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):breset
Net: BWR
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):bwr
Net: D0
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d0
Net: D1
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d1
Net: D10
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d10
Net: D11
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d11
Net: D12
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d12
Net: D13
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d13
Net: D14
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d14
Net: D15
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d15
Net: D2
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d2
Net: D3
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d3
Net: D4
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d4
Net: D5
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d5
Net: D6
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d6
Net: D7
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d7
Net: D8
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d8
Net: D9
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):d9
Net: DATA
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):data
Net: DCLK
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):dclk
Net: DDIR
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):ddir
Net: DEN
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):den
Net: DHEN
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):dhen
PROPAGATION_DELAY = AD:AR:0 ns:1 ns
RATSNEST_SCHEDULE = SOURCE_LOAD_DAISY_CHAIN
Net: FPGA
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):fpga
Net: GAIN
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):gain
Net: GND
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):gnd
RATSNEST_SCHEDULE = FAR_END_CLUSTER
Net: GND_EARTH
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):gnd_earth
Net: HS
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):hs
Net: MCLK
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):mclk
Net: MRD
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):mrd
Net: MWR
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):mwr
Net: N16732
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n16732
Net: N16740
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n16740
Net: N16748
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n16748
Net: N16756
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n16756
Net: N17044
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17044
Net: N17048
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17048
Net: N17052
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17052
Net: N17056
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17056
Net: N17060
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17060
Net: N17064
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17064
Net: N17068
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17068
Net: N17072
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17072
Net: N17076
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17076
Net: N17080
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17080
Net: N17084
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17084
Net: N17088
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17088
Net: N17092
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17092
Net: N17096
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17096
Net: N17100
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17100
Net: N17104
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17104
Net: N17197
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17197
Net: N17197_4623
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17197_4623
Net: N17221
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17221
Net: N17221_4624
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17221_4624
Net: N17269
LOGICAL_PATH = @demo.\demo root schematic\(sch_1):n17269
Net: N17269_4629
LOGICAL_PATH = @demo.\demo root schematic\
没有合适的资源?快使用搜索试试~ 我知道了~
Cadence高速电路板设计与实践范例文件
共747个文件
log:85个
brd:62个
log,1:56个
5星 · 超过95%的资源 需积分: 48 115 下载量 132 浏览量
2013-07-12
11:19:05
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学习cadence较好的参考资料,包括原理图,pcb版图和gerber文件设计指导
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Cadence高速电路板设计与实践范例文件 (747个子文件)
TOP.art 176KB
TOP.art 176KB
BOTTOM.art 107KB
BOTTOM.art 107KB
drill.art 54KB
DRILL.art 54KB
GND.art 35KB
GND.art 35KB
assembly_bottom.art 34KB
assembly_bottom.art 34KB
assembly_top.art 27KB
assembly_top.art 27KB
soldermask_top.art 21KB
soldermask_top.art 21KB
soldermask_bottom.art 14KB
soldermask_bottom.art 14KB
VCC.art 12KB
VCC.art 12KB
pastemask_top.art 9KB
pastemask_top.art 9KB
pastemask_bottom.art 2KB
pastemask_bottom.art 2KB
TOP.art,1 176KB
BOTTOM.art,1 107KB
DRILL.art,1 54KB
assembly_bottom.art,1 34KB
assembly_top.art,1 27KB
soldermask_top.art,1 21KB
soldermask_bottom.art,1 14KB
soldermask_bot.art,1 12KB
VCC.art,1 12KB
GND.art,1 10KB
pastemask_top.art,1 9KB
assembly_bot.art,1 6KB
pastemask_bottom.art,1 2KB
pastemask_bot.art,1 1KB
DEMO.asc 9KB
PADS_DEMO.asc 9KB
DEMO.asc 9KB
Pulse.bmp 41KB
DEMO.BOM 993B
NEW1.BOM 789B
VIEWGERBER.brd 5.29MB
rat_t.brd 1.65MB
highspeed.brd 1.65MB
demo_testprep.brd 1.6MB
demo_silk.brd 1.57MB
demo_ncdrill.brd 1.55MB
demo_drill.brd 1.55MB
demo_final2.brd 1.55MB
demo_rdy2artwork.brd 1.55MB
demo_final.brd 1.54MB
demo_routed.brd 1.54MB
demo_testpoint.brd 1.49MB
demo_cctroute.brd 939KB
demo_final1.brd 879KB
demo_busroute.brd 866KB
demo_rdy2gloss.brd 851KB
demo_fanout.brd 849KB
demo_miter.brd 823KB
demo_autoroute.brd 821KB
demo_custmooth.brd 821KB
demo_misc.brd 810KB
preroute.brd 809KB
demo_pickroute.brd 687KB
demo_manul_route.brd 662KB
demo_plane_new.brd 662KB
demo_delay.brd 657KB
demo_delaytune.brd 657KB
demo_cct_new.brd 653KB
demo_ecset.brd 651KB
demo_nisland.brd 650KB
demo_complex.brd 648KB
demo_split2.brd 640KB
demo_physirules.brd 629KB
demo_phsirules.brd 629KB
demo_split1.brd 615KB
demo_plane.brd 614KB
demo_set_via.brd 610KB
demo_auto_router_place.brd 609KB
demo_placed.brd 607KB
demo_update_symbols.brd 607KB
demo_autoswap.brd 607KB
cds_diff_con.brd 538KB
cds_placed.brd 526KB
demo_place_m.brd 451KB
demo_unplaced.brd 418KB
demo.brd 417KB
demo_addroom.brd 384KB
demo_constraints.brd 383KB
demo_assign_refdes.brd 379KB
demo.brd 317KB
new1.brd 310KB
demo1.brd 259KB
news.brd 176KB
fulladd.brd 157KB
cds_master.brd 123KB
demo_brd_wizard.brd 123KB
demo_brd.brd 117KB
halfadd.brd 113KB
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