BANDWIDTH_TYPE=AUTO
CLK0_DIVIDE_BY=3
CLK0_DUTY_CYCLE=50
CLK0_MULTIPLY_BY=5
CLK0_PHASE_SHIFT=0
COMPENSATE_CLOCK=CLK0
INCLK0_INPUT_FREQUENCY=41666
INTENDED_DEVICE_FAMILY="Cyclone IV E"
LPM_TYPE=altpll
OPERATION_MODE=NORMAL
PLL_TYPE=AUTO
PORT_ACTIVECLOCK=PORT_UNUSED
PORT_ARESET=PORT_USED
PORT_CLKBAD0=PORT_UNUSED
PORT_CLKBAD1=PORT_UNUSED
PORT_CLKLOSS=PORT_UNUSED
PORT_CLKSWITCH=PORT_UNUSED
PORT_CONFIGUPDATE=PORT_UNUSED
PORT_FBIN=PORT_UNUSED
PORT_INCLK0=PORT_USED
PORT_INCLK1=PORT_UNUSED
PORT_LOCKED=PORT_USED
PORT_PFDENA=PORT_UNUSED
PORT_PHASECOUNTERSELECT=PORT_UNUSED
PORT_PHASEDONE=PORT_UNUSED
PORT_PHASESTEP=PORT_UNUSED
PORT_PHASEUPDOWN=PORT_UNUSED
PORT_PLLENA=PORT_UNUSED
PORT_SCANACLR=PORT_UNUSED
PORT_SCANCLK=PORT_UNUSED
PORT_SCANCLKENA=PORT_UNUSED
PORT_SCANDATA=PORT_UNUSED
PORT_SCANDATAOUT=PORT_UNUSED
PORT_SCANDONE=PORT_UNUSED
PORT_SCANREAD=PORT_UNUSED
PORT_SCANWRITE=PORT_UNUSED
PORT_clk0=PORT_USED
PORT_clk1=PORT_UNUSED
PORT_clk2=PORT_UNUSED
PORT_clk3=PORT_UNUSED
PORT_clk4=PORT_UNUSED
PORT_clk5=PORT_UNUSED
PORT_clkena0=PORT_UNUSED
PORT_clkena1=PORT_UNUSED
PORT_clkena2=PORT_UNUSED
PORT_clkena3=PORT_UNUSED
PORT_clkena4=PORT_UNUSED
PORT_clkena5=PORT_UNUSED
PORT_extclk0=PORT_UNUSED
PORT_extclk1=PORT_UNUSED
PORT_extclk2=PORT_UNUSED
PORT_extclk3=PORT_UNUSED
SELF_RESET_ON_LOSS_LOCK=OFF
WIDTH_CLOCK=5
DEVICE_FAMILY="Cyclone IV E"
CBX_AUTO_BLACKBOX=ALL
areset
inclk
inclk
clk
locked
基于FPGA的LCD显示实验代码
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2015-06-10
10:27:42
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01_LCD_Display_Test800480.zip （88个子文件） 
01_LCD_Display_Test800480 sim VGA_Display_TB 
transcript 600B work _vmake 26B lcd_driver verilog.prw 1KB _primary.dat 2KB _primary.vhd 735B verilog.psm 15KB _primary.dbs 4KB @l@c@d_@display_@t@b verilog.prw 456B _primary.dat 1KB _primary.vhd 88B verilog.psm 10KB _primary.dbs 2KB _temp vlogc06eww 979B vlogdw98vh 2KB vlogeh983t 2KB vlogn1ecsh 979B vlog2gz5id 919B vlogt7r102 981B lcd_display verilog.prw 278B _primary.dat 1KB _primary.vhd 373B verilog.psm 7KB _primary.dbs 3KB _info 2KB VGA_Display_TB.v 3KB VGA_Display_TB.mpf 20KB vsim.wlf 456KB lcd_index lcd_display.v 5KB lcd_para.v.bak 4KB lcd_para.v 4KB lcd_driver.v 4KB lcd_driver.v.bak 4KB lcd_display.v.bak 3KB wave.do 1KB VGA_Display_TB.cr.mti 1KB src sys_pll.qip 0B system_index output_files VGA_Display_Test.pti_db_list.ddb 217B VGA_Display_Test.tis_db_list.ddb 217B sys_pll.qip 276B sys_pll.ppf 545B system_ctrl_pll.v 3KB sys_pll.v 16KB system_ctrl_pll.v.bak 4KB system_ctrl.v 3KB system_init_delay.v.bak 2KB system_ctrl.v.bak 3KB Chain1.cdf 367B system_init_delay.v 3KB greybox_tmp 
cbx_args.txt 1KB lcd_24bit_ip sys_pll.qip 0B lcd_driver_zoom.v 3KB lcd_display.v 4KB lcd_para.v.bak 4KB lcd_para.v 5KB lcd_driver.v 4KB lcd_driver.v.bak 4KB greybox_tmp cbx_args.txt 1KB lcd_display.v.bak 3KB lcd_display_Char.v 4KB VGA_Display_Test.v 3KB VGA_Display_Test.v.bak 5KB core doc dev output_files VGA_Display_Test.fit.rpt 215KB VGA_Display_Test.jdi 235B VGA_Display_Test.sof 485KB VGA_Display_Test.flow.rpt 10KB VGA_Display_Test.map.rpt 96KB VGA_Display_Test.sta.rpt 683KB VGA_Display_Test.pof 512KB output_file.jic 512KB VGA_Display_Test.done 26B output_file.map 189B VGA_Display_Test.sta.summary 4KB VGA_Display_Test.asm.rpt 10KB VGA_Display_Test.cdf 401B VGA_Display_Test.map.summary 488B VGA_Display_Test.fit.smsg 567B VGA_Display_Test.fit.summary 633B VGA_Display_Test.pin 32KB sys_pll.qip 0B VGA_Display_Test.qsf 6KB VGA_Display_Test.pti_db_list.ddb 217B VGA_Display_Test.tis_db_list.ddb 217B PLLJ_PLLSPE_INFO.txt 135B VGA_Display_Test.qws 1011B VGA_Display_Test.tcl 5KB VIP_System.sdc.bak 2KB VIP_System.sdc 2KB VGA_Display_Test.qpf 1KB资源评论
