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TFT屏幕-ILI9486数据手册带命令标签版.pdf
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ILI9486手册 官方手册 ILI9486 is a 262,144-color single-chip SoC driver for a-Si TFT liquid crystal display with resolution of 320RGBx480 dots, comprising a 960-channel source driver, a 480-channel gate driver, 345,600bytes GRAM for graphic data of 320RGBx480 dots, and power supply circuit. The ILI9486 supports parallel CPU 8-/9-/16-/18-bit data bus interface and 3-/4-line serial peripheral interfaces (SPI). The ILI9486 is also compliant with RGB (16-/18-bit) data bus for video image display. For high speed serial interface, the ILI9486 also provides one data and clock lane and supports up to 500Mbps on MIPI DSI link. And also support MDDI interface.
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ILI9486
a-Si TFT LCD Single Chip Driver
320RGBx480 Resolution and 262K-color
Specification
Preliminary
Version: V0.01
Document No: ILI9486_SPEC_V001.pdf
ILI TECHNOLOGY CORP.
8F, No. 38, Taiyuan St, Jhubei City,
Taiwan 302, R.O.C.
Tel.886-3-5600099; Fax.886-3-5600585
http://
www.ilitek.com
a-Si TFT LCD Single Chip Driver
320RGBx480 Resolution and 262K-color
ILI9486
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 2 of 311 Version: 0.01
Table of Contents
Section Page
1.
Introduction.................................................................................................................................................... 9
2.
Features ........................................................................................................................................................ 9
3.
Block Diagram ............................................................................................................................................. 11
4.
Pin Descriptions .......................................................................................................................................... 12
5.
Pad Arrangement and Coordination............................................................................................................ 16
6.
Block Function Description.......................................................................................................................... 26
7.
Function Description ................................................................................................................................... 28
7.1.
MCU interfaces .............................................................................................................................. 28
7.1.1.
MCU interface selection ...................................................................................................... 28
7.1.2.
8080-Series Parallel Interface ............................................................................................. 29
7.1.2.1.
Write Cycle Sequence ......................................................................................................... 30
7.1.2.2.
Read Cycle Sequence......................................................................................................... 31
7.1.3.
Serial Interface .................................................................................................................... 32
7.1.3.1.
Write Cycle Sequence ......................................................................................................... 32
7.1.3.2.
Read Cycle Sequence......................................................................................................... 34
7.1.4.
Data Transfer Break and Recovery ..................................................................................... 36
7.1.5.
Data Transfer Pause............................................................................................................ 38
7.1.5.1.
Serial Interface Pause ......................................................................................................... 39
7.1.5.2.
Parallel Interface Pause ...................................................................................................... 39
7.1.6.
Data Transfer Mode............................................................................................................. 40
7.1.6.1.
Method 1.............................................................................................................................. 40
7.1.6.2.
Method 2.............................................................................................................................. 40
7.2.
RGB Interface ................................................................................................................................ 41
7.2.1.
RGB Interface Selection ...................................................................................................... 41
7.2.2.
RGB Interface Timing .......................................................................................................... 43
7.3.
MIPI – DSI (Mobile Industry Processor Interface – Display Serial Interface) ................................ 44
7.3.1.
Interface Level Communication – Clock Lanes ................................................................... 45
7.3.1.1.
Low Power Mode (LPM) ...................................................................................................... 46
7.3.1.2.
Ultra Low Power Mode (ULPM)........................................................................................... 48
7.3.1.3.
High-Speed Clocked Mode (HSCM).................................................................................... 49
7.3.2.
Interface Level Communication – Data Lanes .................................................................... 51
7.3.2.1.
Escape Modes ..................................................................................................................... 52
7.3.2.1.1.
Low-Power Data Transmission (LPDT) ........................................................................ 54
7.3.2.1.2.
Ultra-Low Power State (ULPS) ..................................................................................... 55
7.3.2.1.3.
Remote Application Reset (RAR) ................................................................................. 56
7.3.2.1.4.
Tearing Effect (TEE)...................................................................................................... 57
7.3.2.1.5.
Acknowledge (ACK)...................................................................................................... 58
a-Si TFT LCD Single Chip Driver
320RGBx480 Resolution and 262K-color
ILI9486
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 3 of 311 Version: 0.01
7.3.2.2.
High-Speed Data Transmission (HSDT).............................................................................. 59
7.3.2.2.1.
Entering High-Speed Data Transmission (TSOT of HSDT).......................................... 59
7.3.2.2.2.
Leaving High-Speed Data Transmission (T
EOT
of HSDT) ............................................. 60
7.3.2.2.3.
Burst of the High-Speed Data Transmission (HSDT) ................................................... 61
7.3.2.3.
Bus Turnaround (BTA)......................................................................................................... 62
7.3.3.
Packet Level Communication.............................................................................................. 63
7.3.3.1.
Short Packet and Long Packet Structures........................................................................... 63
7.3.3.1.1.
Bit Order of the Byte on Packets .................................................................................. 64
7.3.3.1.2.
Byte Order of the Multiple Byte Information on Packets............................................... 64
7.3.3.1.3.
Packet Header (PH)...................................................................................................... 65
7.3.3.1.3.1.
Data Identification (DI) ............................................................................................... 66
7.3.3.1.3.1.1.
Virtual Channel (VC) ............................................................................................... 67
7.3.3.1.3.1.2.
Data Type (DT) ....................................................................................................... 68
7.3.3.1.3.2.
Packet Data on the Short Packet............................................................................... 70
7.3.3.1.3.3.
Word Count on the Long Packet................................................................................ 71
7.3.3.1.3.4.
Error Correction Code (ECC)..................................................................................... 72
7.3.3.1.4.
Packet Data on the Long Packet .................................................................................. 76
7.3.3.1.5.
Packet Footer on the Long Packet ............................................................................... 77
7.3.3.2.
Packet Transmissions.......................................................................................................... 79
7.3.3.2.1.
Packet form the MCU to ILI9486 .................................................................................. 79
7.3.3.2.1.1.
Display Command Set (DCS) .................................................................................... 79
7.3.3.2.1.2.
Display Command Set Write, no Parameter (DCSWN-S) ......................................... 80
7.3.3.2.1.3.
Display Command Set Write, 1 Parameter (DCSW1-S)............................................ 81
7.3.3.2.1.4.
Display Command Set Write Long (DCSW-L) ........................................................... 82
7.3.3.2.1.5.
Display Command Set Read, No Parameter (DCSRN-S)......................................... 87
7.3.3.2.1.6.
Null Packet, No Data (NP-L)...................................................................................... 90
7.3.3.2.1.7.
End of Transmission Packet (EoTP).......................................................................... 92
7.3.3.2.2.
Packet from ILI9486 to MCU ........................................................................................ 94
7.3.3.2.2.1.
Used Packet Types .................................................................................................... 94
7.3.3.2.2.2.
Acknowledge with Error Report ................................................................................. 95
7.3.3.2.2.3.
DCS Read Long Response (DCSRR-L) .................................................................... 98
7.3.3.2.2.4.
DCS Read Short Response, 1 Byte Returned (DCSRR1-S)................................... 100
7.3.3.2.2.5.
DCS Read Short Response, 2 Bytes Returned (DCSRR2-S)................................. 101
7.3.3.3.
Communication Sequences............................................................................................... 102
7.3.3.3.1.
DCS Write, 1 Parameter Sequence (DCSRR2-S) ...................................................... 103
7.3.3.3.2.
DCS Write, No Parameter Sequence ......................................................................... 104
7.3.3.3.3.
DCS Write, No Parameter Sequence ......................................................................... 105
7.3.3.3.4.
DCS Read, No Parameter Sequence ......................................................................... 107
7.3.3.3.5.
Null Packet, No Data Sequence ................................................................................. 109
a-Si TFT LCD Single Chip Driver
320RGBx480 Resolution and 262K-color
ILI9486
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 4 of 311 Version: 0.01
7.3.3.3.6.
End of Transmission Packet ....................................................................................... 109
7.4.
CABC (Content Adaptive Brightness Control).............................................................................. 110
7.5.
MDDI (Mobile Display Digital Interface) ....................................................................................... 112
7.6.
Display Data RAM (DDRAM) ....................................................................................................... 122
7.7.
Display Data Format .................................................................................................................... 123
7.7.1.
3-line Serial Interface......................................................................................................... 123
7.7.2.
4-line Serial Interface......................................................................................................... 125
7.7.3.
8-bit Parallel MCU Interface .............................................................................................. 127
7.7.3.1.
8-bit Data Bus for 16-bit/pixel (RGB 5-6-5 bits input), 65K-color ...................................... 128
7.7.3.2.
8-bit Data Bus for 18-bit/pixel (RGB 6-6-6 bits input), 262K-color .................................... 129
7.7.4.
9-bit Parallel MCU Interface .............................................................................................. 130
7.7.5.
16-bit Parallel MCU Interface ............................................................................................ 131
7.7.5.1.
16-bit Data Bus for 16-bit/pixel (RGB 5-6-5 bits input), 65K-color .................................... 132
7.7.5.2.
16-bit Data Bus for 18-bit/pixel (RGB 6-6-6 bits input), 262K-color .................................. 133
7.7.6.
18-bit Parallel MCU Interface ............................................................................................ 134
7.7.6.1.
18-bit Data Bus for 18-bit/pixel (RGB 6-6-6 bits input), 262K-color .................................. 135
7.7.7.
16-bit Parallel RGB Interface............................................................................................. 136
7.7.8.
18-bit Parallel RGB Interface............................................................................................. 136
7.7.9.
MIPI - DSI .......................................................................................................................... 137
7.7.10.
MIPI – 18-bit per Pixel, Long packet, Data Type = 01 1110 (1Eh)..................................... 138
7.7.11.
MIPI – 18-bit per Pixel, Long packet, Data Type = 10 1110 (2Eh)..................................... 139
7.8.
Z-inversion.................................................................................................................................... 140
7.8.1 Z-inversion concept ............................................................................................................... 141
7.8.2 Z-inversion Odd/Even Gate data input method..................................................................... 142
7.8.3 Z-inversion data input method............................................................................................... 143
7.8.3.1 Z-inversion RED Data display ............................................................................................ 144
7.8.3.2 Z-inversion GREEN Data display....................................................................................... 145
7.8.3.3 Z-inversion BLUE Data display .......................................................................................... 146
8.
Command.................................................................................................................................................. 147
8.1.
Command List .............................................................................................................................. 147
8.2.
Command Description.................................................................................................................. 152
8.2.1.
NOP (00h).......................................................................................................................... 152
8.2.2.
Soft Reset (01h) ................................................................................................................ 153
8.2.3.
Read display identification information (04h) .................................................................... 154
8.2.4.
Read Number of the Errors on DSI (05h).......................................................................... 155
8.2.5.
Read Display Status (09h)................................................................................................. 156
8.2.6.
Read Display Power Mode (0Ah) ...................................................................................... 158
8.2.7.
Read Display MADCTL (0Bh)............................................................................................ 160
8.2.8.
Read Display Pixel Format (0Ch)...................................................................................... 162
a-Si TFT LCD Single Chip Driver
320RGBx480 Resolution and 262K-color
ILI9486
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 5 of 311 Version: 0.01
8.2.9.
Read Display Image Mode (0Dh) ...................................................................................... 163
8.2.10.
Read Display Signal Mode (0Eh) ...................................................................................... 165
8.2.11.
Read Display Self-Diagnostic Result (0Fh) ....................................................................... 167
8.2.12.
Sleep IN (10h) ................................................................................................................... 169
8.2.13.
Sleep OUT (11h)................................................................................................................ 170
8.2.14.
Partial Mode ON (12h)....................................................................................................... 171
8.2.15.
Normal Display Mode ON (13h) ........................................................................................ 172
8.2.16.
Display Inversion OFF (20h).............................................................................................. 173
8.2.17.
Display Inversion ON (21h) ............................................................................................... 174
8.2.18.
Display OFF (28h) ............................................................................................................. 175
8.2.19.
Display ON (29h) ............................................................................................................... 176
8.2.20.
Column Address Set (2Ah) ................................................................................................ 177
8.2.21.
Page Address Set (2Bh) .................................................................................................... 179
8.2.22.
Memory Write (2Ch) .......................................................................................................... 181
8.2.23.
Memory Read (2Eh) .......................................................................................................... 183
8.2.24.
Partial Area (30h)............................................................................................................... 185
8.2.25.
Vertical Scrolling Definition (33h) ...................................................................................... 187
8.2.26.
Tearing Effect Line OFF (34h) ........................................................................................... 190
8.2.27.
Tearing Effect Line ON (35h) ............................................................................................. 191
8.2.28.
Memory Access Control (36h) ........................................................................................... 193
8.2.29.
Vertical Scrolling Start Address (37h) ................................................................................ 195
8.2.30.
Idle Mode OFF (38h) ......................................................................................................... 197
8.2.31.
Idle Mode ON (39h) ........................................................................................................... 198
8.2.32.
Interface Pixel Format (3Ah).............................................................................................. 200
8.2.33.
Memory Write Continue (3Ch)........................................................................................... 201
8.2.34.
Memory Read Continue (3Eh)........................................................................................... 203
8.2.35.
Write Tear Scan Line (44h)................................................................................................ 205
8.2.36.
Read Scan Line (45h)........................................................................................................ 206
8.2.37.
Write Display Brightness Value (51h) ................................................................................ 207
8.2.38.
Read Display Brightness Value (52h)................................................................................ 208
8.2.39.
Write CTRL Display Value (53h)........................................................................................ 209
8.2.40.
Read CTRL Display Value (54h) ....................................................................................... 211
8.2.41.
Write Content Adaptive Brightness Control Value (55h).................................................... 212
8.2.42.
Read Content Adaptive Brightness Control Value (56h) ................................................... 213
8.2.43.
Write CABC Minimum Brightness (5Eh)............................................................................ 214
8.2.44.
Read CABC Minimum Brightness (5Fh)............................................................................ 215
8.2.45.
Read First Checksum (AAh).............................................................................................. 216
8.2.46.
Read Continue Checksum (AFh) ...................................................................................... 217
8.2.47.
Read ID1 (DAh) ................................................................................................................. 218
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