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MPC8245UM/D

10/2001

Rev. 1

MPC8245 Integrated Processor

User’s Manual

HOW TO REACH US:

USA/EUROPE/LOCATIONS NOT LISTED:

Motorola Literature Distribution;

P.O. Box 5405, Denver, Colorado 80217

1-303-675-2140 or 1-800-441-2447

JAPAN:

Motorola Japan Ltd.; SPS, Technical Information Center,

3-20-1, Minami-Azabu Minato-ku, Tokyo 106-8573 Japan

81-3-3440-3569

ASIA/PACIFIC:

Motorola Semiconductors H.K. Ltd.; Silicon Harbour

Centre, 2 Dai King Street, Tai Po Industrial Estate, Tai Po,

N.T.,

Hong Kong

852-26668334

TECHNICAL INFORMATION CENTER:

1-800-521-6274

HOME PAGE:

http://www.motorola.com/semiconductors

DOCUMENT COMMENTS:

FAX (512) 933-2625,

Attn: RISC Applications Engineering

Information in this document is provided solely to enable system and software

implementers to use Motorola products. There are no express or implied copyright

licenses granted hereunder to design or fabricate any integrated circuits or

integrated circuits based on the information in this document.

Motorola reserves the right to make changes without further notice to any products

herein. Motorola makes no warranty, representation or guarantee regarding the

suitability of its products for any particular purpose, nor does Motorola assume any

liability arising out of the application or use of any product or circuit, and speciﬁcally

disclaims any and all liability, including without limitation consequential or incidental

damages. “Typical” parameters which may be provided in Motorola data sheets

and/or speciﬁcations can and do vary in different applications and actual

performance may vary over time. All operating parameters, including “Typicals”

must be validated for each customer application by customer’s technical experts.

Motorola does not convey any license under its patent rights nor the rights of

others. Motorola products are not designed, intended, or authorized for use as

components in systems intended for surgical implant into the body, or other

applications intended to support or sustain life, or for any other application in which

the failure of the Motorola product could create a situation where personal injury or

death may occur. Should Buyer purchase or use Motorola products for any such

unintended or unauthorized application, Buyer shall indemnify and hold Motorola

and its ofﬁcers, employees, subsidiaries, afﬁliates, and distributors harmless

against all claims, costs, damages, and expenses, and reasonable attorney fees

arising out of, directly or indirectly, any claim of personal injury or death associated

with such unintended or unauthorized use, even if such claim alleges that Motorola

was negligent regarding the design or manufacture of the part.

Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark

Ofﬁce. digital dna is a trademark of Motorola, Inc. All other product or service

names are the property of their respective owners. Motorola, Inc. is an Equal

Opportunity/Afﬁrmative Action Employer.

CONTENTS

Paragraph

Number

Title

Page

Number

MOTOROLA

Contents

Chapter 1

Overview

1.1 MPC8245 Integrated Processor Overview.......................................................... 1-1

1.1.1 MPC8245 Integrated Processor Features........................................................ 1-3

1.1.2 MPC8245 Integrated Processor Applications................................................. 1-5

1.2 Processor Core Overview.................................................................................... 1-8

1.3 Peripheral Logic Bus......................................................................................... 1-11

1.4 Peripheral Logic Overview ............................................................................... 1-11

1.4.1 Memory System Interface............................................................................. 1-12

1.4.2 Peripheral Component Interconnect (PCI) Interface .................................... 1-13

1.4.2.1 PCI Agent Capability................................................................................ 1-14

1.4.2.2 PCI Bus Arbitration Unit .......................................................................... 1-14

1.4.2.3 Address Maps and Translation.................................................................. 1-14

1.4.2.4 Byte Ordering ........................................................................................... 1-15

1.4.2.5 Bus Clock Buffers and Bus Ratios ........................................................... 1-15

1.4.3 DMA Controller............................................................................................ 1-15

1.4.4 Message Unit (MU) ...................................................................................... 1-15

1.4.4.1 Doorbell Registers .................................................................................... 1-15

1.4.4.2 Inbound and Outbound Message Registers .............................................. 1-16

1.4.4.3 Intelligent Input/Output Controller (I

O) ................................................. 1-16

1.4.5 Inter-Integrated Circuit (I

C) Controller....................................................... 1-16

1.4.6 Embedded Programmable Interrupt Controller (EPIC)................................ 1-17

1.4.7 Dual Universal Asynchronous Receiver/Transmitter (DUART)................... 1-17

1.4.8 Integrated PCI Bus and SDRAM Clock Generation .................................... 1-18

1.4.9 Performance Monitor.................................................................................... 1-18

1.5 Power Management .......................................................................................... 1-19

1.5.1 Programmable Processor Power Management Modes ................................. 1-19

1.5.2 Programmable Peripheral Logic Power Management Modes ...................... 1-20

1.6 Programmable I/O Signals with Watchpoint..................................................... 1-21

1.7 Debug Features ................................................................................................. 1-21

1.7.1 Memory Attribute and PCI Attribute Signals................................................ 1-21

1.7.2 Memory Debug Address ............................................................................... 1-21

1.7.3 Memory Interface Valid (MIV

)..................................................................... 1-22

1.7.4 Error Injection/Capture on Data Path ........................................................... 1-22

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zzzzrp

2012-12-12

2001年版的user manul，

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