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DS1340Z-33+T&R ADI芯片 电子元器件中文版规格手册.pdf
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DS1340Z-33+T&R ADI芯片 电子元器件中文版规格手册
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DS1340
I
2
C RTC with Trickle Charger
General Description
The DS1340 is a real-time clock (RTC)/calendar that is
pin compatible and functionally equivalent to the ST
M41T00, including the software clock calibration. The
device additionally provides trickle-charge capability
on the V
BACKUP
pin, a lower timekeeping voltage, and
an oscillator STOP flag. Block access of the register
map is identical to the ST device. Two additional regis-
ters, which are accessed individually, are required for
the trickle charger and flag. The clock/calendar pro-
vides seconds, minutes, hours, day, date, month, and
year information. A built-in power-sense circuit detects
power failures and automatically switches to the back-
up supply. Reads and writes are inhibited while the
clock continues to run. The device is programmed seri-
ally through an I
2
C bidirectional bus.
Applications
Portable Instruments
Point-of-Sale Equipment
Medical Equipment
Telecommunications
Benefits and Features
• Enhanced Second Source for the ST M41T00
• Completely Manages All Timekeeping Functions
• RTC Counts Seconds, Minutes, Hours, Day, Date,
Month, and Year
• Software Clock Calibration
• Oscillator Stop Flag
• Low-Power Operation Extends Battery Backup Run
Time
• Low Timekeeping Voltage Down to 1.3V
• Automatic Power-Fail Detect and Switch Circuitry
• Trickle-Charge Capability
• Three Operating Voltage Ranges (1.8V, 3V, and 3.3V)
Supports Systems Using Legacy and Modern Power
Buses
• Surface-Mount Package with an Integrated Crystal
(DS1340C) Saves Additional Space and Simplifies
Design
• Simple Serial Port Interfaces with Most Microcontrollers
• Fast (400kHz) I
2
C Interface
• 8-Pin µSOP or SO Package Minimizes Required
Space
• Underwriters Laboratories (UL
®
) Recognized
Ordering Information
4
CPU
V
CC
V
CC
V
CC
5
6
8
12
SDA
SCL
GND
X2X1
V
CC
C1
R
PU
R
PU
CRYSTAL
FT/OUT
V
BACKUP
3
7
R
PU
= t
R
/ C
B
DS1340
Typical Operating Circuit
PART TEMP RANGE
PIN-
PACKAGE
TOP MARK
†
DS1340Z-18+ -40°C to +85°C
8 SO
(0.150in)
D1340-18
DS1340Z-3+ -40°C to +85°C
8 SO
(0.150in)
DS1340-3
DS1340Z-33+ -40°C to +85°C
8 SO
(0.150in)
D134033
DS1340U-18+ -40°C to +85°C 8 μSOP 1340 -18
DS1340U-3+ -40°C to +85°C 8 μSOP 1340 -3
DS1340U-33+ -40°C to +85°C 8 μSOP 1340 -33
DS1340C-18# -40°C to +85°C 16 SO DS1340C-18
DS1340C-3# -40°C to +85°C 16 SO DS1340C-3
DS1340C-33# -40°C to +85°C 16 SO DS1340C-33
Pin Configurations appear at end of data sheet.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
#
Denotes a RoHS-compliant device that may include lead(Pb)
that is exempt under RoHS requirements. The lead finish is
JESD97 category e3, and is compatible with both lead-based
and lead-free soldering processes.
†
A "+" anywhere on the top mark denotes a lead(Pb)-free device.
A "#" denotes a RoHS-compliant device.
UL is a registered trademark of Underwriters Laboratories Inc.
19-5578; Rev 9; 4/15
DS1340
I
2
C RTC with Trickle Charger
Maxim Integrated | 2www.maximintegrated.com
Absolute Maximum Ratings
Recommended DC Operating Conditions
(V
CC
= V
CC MIN
to V
CC MAX
, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
= 3.3V, T
A
= +25°C, unless
otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on V
CC
or V
BACKUP
Pins
Relative to Ground.............................................-0.3V to +6.0V
Voltage Range on SDA, SCL, and FT/OUT
Relative to Ground..................................-0.3V to (V
CC
+ 0.3V)
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-55°C to +125°C
Lead Temperature (soldering, 10s) .................................+260°C
Soldering Temperature (reflow) .......................................+260°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DS1340-18 1.71 1.8 5.5
DS1340-3 2.7 3.0 5.5
Supply Voltage (Note 2) V
CC
DS1340-33 2.97 3.3 5.5
V
Input Logic 1 (SDA, SCL) V
IH
(Note 2) 0.7 x V
CC
V
CC
+ 0.3 V
Input Logic 0 (SDA, SCL) V
IL
(Note 2) -0.3 +0.3 x V
CC
V
Supply Voltage, Pullup
(FT/OUT, SDA, SCL), V
CC
= 0V
V
PU
(Note 2) 5.5 V
DS1340-18 1.3 3.7
DS1340-3 1.3 3.7
Backup Supply Voltage (Note 2) V
BACKUP
DS1340-33 1.3 5.5
V
R1 (Notes 3, 4) 250
R2 (Note 5) 2000
Trickle-Charge Current-Limiting
Resistors
R3 (Note 6) 4000
DS1340-18 1.51 1.6 1.71
DS1340-3 2.45 2.6 2.7
Power-Fail Voltage (Note 2) V
PF
DS1340-33 2.70 2.88 2.97
V
Input Leakage (SCL, CLK) I
LI
-1 +1 μA
I/O Leakage (SDA, FT/OUT) I
LO
-1 +1 μA
V
CC
> 2V; V
OL
= 0.4V 3.0
SDA Logic 0 Output I
OLSDA
1.7V < V
CC
< 2V; V
OL
= 0.2 x V
CC
3.0
mA
V
CC
> 2V; V
OL
= 0.4V 3.0
1.7V < V
CC
< 2V; V
OL
= 0.2 x V
CC
3.0
mA
FT/OUT Logic 0 Output I
OLSQW
1.3V < V
CC
< 1.7V; V
OL
= 0.2x V
CC
250 μA
DS1340-18; V
CC
= 1.89V 72 150
DS1340-3; V
CC
= 3.3V 108 200
Active Supply Current (Note 7) I
CCA
DS1340-33; V
CC
= 5.5V 192 300
μA
DS1340-18; V
CC
= 1.89V 60 100
DS1340-3; V
CC
= 3.3V 81 125
Standby Current (Note 8) I
CCS
DS1340-33; V
CC
= 5.5V 100 150
μA
V
BACKUP
Leakage Current I
BACKUPLKG
V
BACKUP
= 3.7V 100 nA
DS1340
I
2
C RTC with Trickle Charger
Maxim Integrated | 3www.maximintegrated.com
DC Electrical Characteristics
(V
CC
= 0V, V
BACKUP
= 3.7V, T
A
= -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
I
BACKUP1
OSC ON, FT = 0 (Note 9) 800 1150
I
BACKUP2
OSC ON, FT = 1 (Note 9) 850 1250
V
BACKUP
Current
I
BACKUP3
OSC ON, FT = 0, V
BACKUP
= 3.0V,
T
A
= +25°C (Notes 9, 10)
800 1000
nA
V
BACKUP
Data-Retention Current I
BACKUPDR
OSC OFF 25.0 100 nA
AC Electrical Characteristics
(V
CC
= V
CC MIN
to V
CC MAX
, T
A
= -40°C to +85°C, unless otherwise noted.) (Notes 1,14, Figure 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Standard mode 0 100
SCL Clock Frequency f
SCL
Fast mode 100 400
kHz
Standard mode 4.7
Bus Free Time Between STOP
and START Conditions
t
BUF
Fast mode 1.3
μs
Standard mode 4.0
Hold Time (Repeated) START
Condition (Note 11)
t
HD:STA
Fast mode 0.6
μs
Standard mode 4.7
Low Period of SCL Clock t
LOW
Fast mode 1.3
μs
Standard mode 4.0
High Period of SCL Clock t
HIGH
Fast mode 0.6
μs
Standard mode 0 0.9
Data Hold Time (Notes 12, 13) t
HD:DAT
Fast mode 0 0.9
μs
Standard mode 250
Data Setup Time (Note 14) t
SU:DAT
Fast mode 100
ns
Standard mode 4.7
START Setup Time t
SU:STA
Fast mode 0.6
μs
Standard mode 20 + 0.1C
B
1000
Rise Time of SDA and SCL
Signals (Note 15)
t
R
Fast mode 20 + 0.1C
B
300
ns
Standard mode 20 + 0.1C
B
300
Fall Time of SDA and SCL
Signals (Note 15)
t
F
Fast mode 20 + 0.1C
B
300
ns
Standard mode 4.7
Setup Time for STOP Condition t
SU:STO
Fast mode 0.6
μs
Capacitive Load for Each Bus
Line
C
B
(Note 15) 400 pF
I/O Capacitance (SCL, SDA) C
I/O
10 pF
Pulse Width of Spikes that Must
be Suppressed by the Input
Filter
t
SP
Fast mode 30 ns
Oscillator Stop Flag (OSF) Delay t
OSF
(Note 16) 100 ms
DS1340
I
2
C RTC with Trickle Charger
Maxim Integrated | 4www.maximintegrated.com
Power-Up/Power-Down Characteristics
(T
A
= -40°C to +85°C) (Figure 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Recovery at Power-Up t
REC
(Note 17) 2 ms
V
CC
Fall Time; V
PF(MAX)
to
V
PF(MIN)
t
VCCF
300 µs
V
CC
Rise Time; V
PF(MIN)
to
V
PF(MAX)
t
VCCR
0µs
WARNING: Under no circumstances are negative undershoots, of any amplitude, allowed when device is in battery-backup mode.
Note 1: Limits at -40°C are guaranteed by design and not production tested.
Note 2: All voltages are referenced to ground.
Note 3: Measured at V
CC
= typ, V
BACKUP
= 0V, register 08h = A5h.
Note 4: The use of the 250Ω trickle-charge resistor is not allowed at V
CC
> 3.63V and should not be enabled.
Note 5: Measured at V
CC
= typ, V
BACKUP
= 0V, register 08h = A6h.
Note 6: Measured at V
CC
= typ, V
BACKUP
= 0V, register 08h = A7h.
Note 7: I
CCA
—SCL clocking at max frequency = 400kHz.
Note 8: Specified with I
2
C bus inactive.
Note 9: Measured with a 32.768kHz crystal attached to the X1 and X2 pins.
Note 10: Limits at +25°C are guaranteed by design and not production tested.
Note 11: After this period, the first clock pulse is generated.
Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the V
IH(MIN)
of the SCL
signal) to bridge the undefined region of the falling edge of SCL.
Note 13: The maximum t
HD:DAT
only has to be met if the device does not stretch the low period (t
LOW
) of the SCL signal.
Note 14: A fast-mode device can be used in a standard-mode system, but the requirement t
SU:DAT
≥ to 250ns must be met. This
is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the
low period of the SCL signal, it must output the next data bit to the SDA line t
R MAX
+ t
SU:DAT
= 1000 + 250 = 1250ns
before the SCL line is released.
Note 15: C
B
—total capacitance of one bus line in pF.
Note 16: The parameter t
OSF
is the period of time the oscillator must be stopped for the OSF flag to be set over the 0V ≤ V
CC
≤
V
CCMAX
and 1.3V ≤ V
BAT
≤ 3.7V range.
Note 17: This delay applies only if the oscillator is enabled and running. If the oscillator is disabled or stopped, no power-up delay
occurs.
SCL
NOTE: TIMING IS REFERENCED TO V
IL(MAX)
AND V
IH(MIN)
.
SDA
STOP START REPEATED
START
t
BUF
t
HD:STA
t
HD:DAT
t
SU:DAT
t
SU:STO
t
HD:STA
t
SP
t
SU:STA
t
HIGH
t
R
t
F
t
LOW
Figure 1. Data Transfer on I
2
C Serial Bus
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