原板厂例程，包含Zynq下的vivado工程、vitis工程，以及对应的说明文档！
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2022-01-22
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原板厂例程，包含Zynq下的vivado工程、vitis工程，以及对应的说明文档！ （638个子文件） 
__synthesis_is_complete__ 0B __synthesis_is_complete__ 0B __synthesis_is_complete__ 0B __synthesis_is_complete__ 0B __synthesis_is_complete__ 0B __synthesis_is_complete__ 0B __synthesis_is_complete__ 0B __synthesis_is_complete__ 0B runme.bat 229B runme.bat 229B runme.bat 229B runme.bat 229B runme.bat 229B runme.bat 229B runme.bat 229B runme.bat 229B runme.bat 229B build_vitis.bat 70B bd_afc3.bd 129KB design_1.bd 100KB bd_f60c.bd 7KB BOOT.BIN 7.69MB design_1_wrapper.bit 7.44MB bd_afc3.bxml 14KB design_1.bxml 5KB bd_f60c.bxml 3KB psu_init_gpl.c 960KB psu_init.c 960KB main.c 4KB pl_bram_ctrl_selftest.c 2KB pl_bram_ctrl.c 191B design_1_axi_smc_0.cpp 94KB design_1_zynq_ultra_ps_e_0_0.cpp 40KB design_1_axi_bram_ctrl_0_0.cpp 33KB axi_bram_memory_imp.cpp 13KB zynq_ultra_ps_e_tlm.cpp 9KB xilinx_zynqmp.cpp 9KB smartconnect_xtlm_impl.cpp 6KB design_1_zynq_ultra_ps_e_0_0_sc.cpp 5KB design_1_axi_bram_ctrl_0_0_sc.cpp 4KB design_1_axi_smc_0_sc.cpp 3KB bd_afc3_one_0.cpp 3KB axi_bram_ctrl.cpp 2KB smartconnect_xtlm.cxx 92KB axi_bram_fmodel_shared_memory.cxx 14KB axi_bram_ram_fmodel.cxx 10KB smartconnect.cxx 7KB axi_bram_fmodel_base.cxx 3KB design_1_wrapper_routed.dcp 9.18MB design_1_wrapper_physopt.dcp 7.83MB design_1_wrapper_placed.dcp 7.83MB design_1_wrapper_opt.dcp 5.97MB design_1_axi_smc_0.dcp 3.76MB design_1_axi_smc_0.dcp 3.76MB design_1_system_ila_0_0.dcp 819KB design_1_system_ila_0_0.dcp 819KB design_1_zynq_ultra_ps_e_0_0.dcp 399KB design_1_zynq_ultra_ps_e_0_0.dcp 399KB design_1_axi_bram_ctrl_0_0.dcp 122KB design_1_axi_bram_ctrl_0_0.dcp 122KB design_1_wrapper.dcp 97KB design_1_pl_bram_ctrl_0_0.dcp 89KB design_1_pl_bram_ctrl_0_0.dcp 89KB design_1_blk_mem_gen_0_0.dcp 69KB design_1_blk_mem_gen_0_0.dcp 69KB design_1_rst_ps8_0_99M_0.dcp 22KB design_1_rst_ps8_0_99M_0.dcp 22KB psu_init_gpl.h 1.59MB psu_init.h 1.59MB design_1_axi_smc_0.h 31KB design_1_zynq_ultra_ps_e_0_0.h 16KB design_1_axi_bram_ctrl_0_0.h 14KB b_transport_converter.h 12KB zynq_ultra_ps_e_tlm.h 9KB smartconnect_xtlm.h 7KB xilinx_zynqmp.h 6KB xfsbl_config.h 6KB axi_bram_ram_fmodel.h 4KB axi_bram_fmodel_shared_memory.h 4KB axi_bram_fmodel_base.h 4KB design_1_axi_smc_0_sc.h 3KB design_1_zynq_ultra_ps_e_0_0_sc.h 3KB design_1_axi_bram_ctrl_0_0_sc.h 3KB smartconnect.h 3KB P2P_XTLM_extension.h 3KB xlconstant_v1_1_7.h 3KB bd_afc3_one_0.h 3KB pl_bram_ctrl.h 2KB pl_bram_ctrl.h 2KB axi_bram_ctrl.h 2KB smartconnect_xtlm_impl.h 2KB axi_bram_memory_imp.h 1KB
usage_statistics_webtalk.html 385KB psu_init.html 54KB design_1_wrapper.hwdef 960KB design_1_zynq_ultra_ps_e_0_0.hwdef 822KB design_1_axi_smc_0.hwdef 68KB design_1.hwdef 57KB design_1_system_ila_0_0.hwdef 14KB design_1_axi_smc_0.hwh 713KB共 638 条
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